]> git.sur5r.net Git - u-boot/commitdiff
video: atmel_hlcdfb: Fix misaligned cache operation warning
authorWenyou Yang <wenyou.yang@atmel.com>
Fri, 2 Jun 2017 03:29:04 +0000 (11:29 +0800)
committerAnatolij Gustschin <agust@denx.de>
Fri, 9 Jun 2017 13:33:28 +0000 (15:33 +0200)
Fix the warning,
 ---8<---
CACHE: Misaligned operation at range [3fdffff03fdffffc]
 ---<8---

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
drivers/video/atmel_hlcdfb.c

index 47078fdaaedc81c9ecb6c36cecf15d70c881dc6b..f77da2ec9797eafb0336bdd2cf7856a2bffd2a03 100644 (file)
@@ -426,7 +426,9 @@ static void atmel_hlcdc_init(struct udevice *dev)
        writel(~0UL, &regs->lcdc_baseidr);
 
        /* Setup the DMA descriptor, this descriptor will loop to itself */
-       desc = (struct lcd_dma_desc *)(uc_plat->base - 16);
+       desc = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*desc));
+       if (!desc)
+               return;
 
        desc->address = (u32)uc_plat->base;
 
@@ -436,7 +438,9 @@ static void atmel_hlcdc_init(struct udevice *dev)
        desc->next = (u32)desc;
 
        /* Flush the DMA descriptor if we enabled dcache */
-       flush_dcache_range((u32)desc, (u32)desc + sizeof(*desc));
+       flush_dcache_range((u32)desc,
+                          ALIGN(((u32)desc + sizeof(*desc)),
+                          CONFIG_SYS_CACHELINE_SIZE));
 
        writel(desc->address, &regs->lcdc_baseaddr);
        writel(desc->control, &regs->lcdc_basectrl);