Add PHYLIB and MII dependencies and enable it by default for Microblaze.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
#define XILINX_SYSACE_HIGHADDR 0x4180ffff
#define XILINX_SYSACE_MEM_WIDTH 16
-/* Ethernet controller is Ethernet_MAC */
-#define XILINX_EMACLITE_BASEADDR 0x40C00000
-
/* Watchdog IP is wxi_timebase_wdt_0 */
#define XILINX_WATCHDOG_BASEADDR 0x50000000
#define XILINX_WATCHDOG_IRQ 1
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_EMBED=y
CONFIG_DM_ETH=y
-CONFIG_PHYLIB=y
+CONFIG_XILINX_EMACLITE=y
CONFIG_SYS_NS16550=y
CONFIG_XILINX_UARTLITE=y
help
This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
+config XILINX_EMACLITE
+ depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP)
+ select PHYLIB
+ select MII
+ bool "Xilinx Ethernetlite"
+ help
+ This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs.
+
config ZYNQ_GEM
depends on DM_ETH && (ARCH_ZYNQ || ARCH_ZYNQMP)
select PHYLIB
/* ethernet */
#undef CONFIG_SYS_ENET
-#if defined(XILINX_EMACLITE_BASEADDR) || defined(CONFIG_OF_CONTROL)
-# define CONFIG_XILINX_EMACLITE 1
+#if defined(CONFIG_XILINX_EMACLITE)
# define CONFIG_SYS_ENET
#endif
#if defined(XILINX_AXIEMAC_BASEADDR)