u32 spl_boot_device(void)
 {
-#ifdef CONFIG_SPL_MMC_SUPPORT
+#ifdef CONFIG_SPL_SPI_SUPPORT
+       socfpga_per_reset(SOCFPGA_RESET(QSPI), 0);
+       return BOOT_DEVICE_SPI;
+#elif CONFIG_SPL_MMC_SUPPORT
        socfpga_per_reset(SOCFPGA_RESET(SDMMC), 0);
        socfpga_per_reset(SOCFPGA_RESET(DMA), 0);
        return BOOT_DEVICE_MMC1;
 
 #define CONFIG_SPL_WATCHDOG_SUPPORT
 #define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_SPI_SUPPORT
 
 /* SPL SDMMC boot support */
 #ifdef CONFIG_SPL_MMC_SUPPORT
 #endif
 #endif
 
+/* SPL QSPI boot support */
+#ifdef CONFIG_SPL_SPI_SUPPORT
+#define CONFIG_DM_SEQ_ALIAS            1
+#define CONFIG_SPL_SPI_FLASH_SUPPORT
+#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SYS_SPI_U_BOOT_OFFS     0x40000
+#endif
+
 /*
  * Stack setup
  */