]> git.sur5r.net Git - u-boot/commitdiff
Merge with /home/stefan/git/u-boot/zeus
authorStefan Roese <sr@denx.de>
Tue, 14 Aug 2007 13:00:42 +0000 (15:00 +0200)
committerStefan Roese <sr@denx.de>
Tue, 14 Aug 2007 13:00:42 +0000 (15:00 +0200)
1  2 
MAINTAINERS
MAKEALL
Makefile
include/ppc405.h
post/cpu/ppc4xx/uart.c

diff --cc MAINTAINERS
Simple merge
diff --cc MAKEALL
index 61a4d4570d293375425f99b6efd407fcc1e9d01e,00cb6b5351c8038ee935c7f1801e5c733680903e..8d1830f05caec01e642feffc8ff9809d70575abc
+++ b/MAKEALL
@@@ -82,16 -82,16 +82,17 @@@ LIST_4xx=" 
        CPCI405DT       CPCI440         CPCIISER4       CRAYL1          \
        csb272          csb472          DASA_SIM        DP405           \
        DU405           ebony           ERIC            EXBITGEN        \
 -      G2000           HH405           HUB405          JSE             \
 -      KAREF           katmai          luan            lwmon5          \
 -      METROBOX        MIP405          MIP405T         ML2             \
 -      ml300           ocotea          OCRTC           ORSG            \
 -      p3p440          PCI405          pcs440ep        PIP405          \
 -      PLU405          PMC405          PPChameleonEVB  sbc405          \
 -      sc3             sequoia         sequoia_nand    taihu           \
 -      taishan         VOH405          VOM405          W7OLMC          \
 -      W7OLMG          walnut          WUH405          XPEDITE1K       \
 -      yellowstone     yosemite        yucca           zeus            \
 +      G2000           HH405           hcu4            hcu5            \
 +      HUB405          JSE             KAREF           katmai          \
 +      luan            lwmon5          METROBOX        MIP405          \
 +      MIP405T         ML2             ml300           ocotea          \
 +      OCRTC           ORSG            p3p440          PCI405          \
 +      pcs440ep        PIP405          PLU405          PMC405          \
 +      PPChameleonEVB  sbc405          sc3             sequoia         \
-       sequoia_nand    taishan         VOH405          VOM405          \
-       W7OLMC          W7OLMG          walnut          WUH405          \
-       XPEDITE1K       yellowstone     yosemite        yucca           \
++      sequoia_nand    taihu           taishan         VOH405          \
++      VOM405          W7OLMC          W7OLMG          walnut          \
++      WUH405          XPEDITE1K       yellowstone     yosemite        \
++      yucca           zeus                                            \
  "
  
  #########################################################################
diff --cc Makefile
index 8282c71d1540a0fa0171855332866c1b60ffcec3,d75f8fdddb8e39457f70d82c7b1109919536e554..a647d54be2ac45fb42f84c96421ab24caf5817a1
+++ b/Makefile
@@@ -1258,8 -1252,11 +1258,11 @@@ rainier_nand_config: unconfi
        @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
  
  sc3_config:unconfig
 -      @./mkconfig $(@:_config=) ppc ppc4xx sc3
 +      @$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3
  
+ taihu_config: unconfig
+       @$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc
  taishan_config:       unconfig
        @$(MKCONFIG) $(@:_config=) ppc ppc4xx taishan amcc
  
Simple merge
index 0aeed75ae6ff93a4142ec3e1dbfd59a397b6bad2,0cffda5fca2b57de188edecf52cc2cef9dce67c6..5f14967fee945e5b665412d5b9f0c0e13af62d81
  
  DECLARE_GLOBAL_DATA_PTR;
  
++<<<<<<< master
 +#if !defined(CFG_EXT_SERIAL_CLOCK)
 +static void serial_divs (int baudrate, unsigned long *pudiv,
 +                       unsigned short *pbdiv)
 +{
 +      sys_info_t sysinfo;
 +      unsigned long div;              /* total divisor udiv * bdiv */
 +      unsigned long umin;             /* minimum udiv */
 +      unsigned short diff;            /* smallest diff */
 +      unsigned long udiv;             /* best udiv */
 +      unsigned short idiff;           /* current diff */
 +      unsigned short ibdiv;           /* current bdiv */
 +      unsigned long i;
 +      unsigned long est;              /* current estimate */
 +
 +      get_sys_info(&sysinfo);
 +
 +      udiv = 32;                      /* Assume lowest possible serial clk */
 +      div = sysinfo.freqPLB / (16 * baudrate); /* total divisor */
 +      umin = sysinfo.pllOpbDiv << 1;  /* 2 x OPB divisor */
 +      diff = 32;                      /* highest possible */
 +
 +      /* i is the test udiv value -- start with the largest
 +       * possible (32) to minimize serial clock and constrain
 +       * search to umin.
 +       */
 +      for (i = 32; i > umin; i--) {
 +              ibdiv = div / i;
 +              est = i * ibdiv;
 +              idiff = (est > div) ? (est-div) : (div-est);
 +              if (idiff == 0) {
 +                      udiv = i;
 +                      break;  /* can't do better */
 +              } else if (idiff < diff) {
 +                      udiv = i;       /* best so far */
 +                      diff = idiff;   /* update lowest diff*/
 +              }
 +      }
 +
 +      *pudiv = udiv;
 +      *pbdiv = div / udiv;
 +}
 +#endif
 +
++=======
+ #if defined(CONFIG_440)
++>>>>>>> zeus
  static int uart_post_init (unsigned long dev_base)
  {
        unsigned long reg;