dm: mips: Fix lb60 WDT control

Write the TSCR register via 32bit write instead of 16bit one.
The register is 32bit wide and bit 16 is being set, triggering
gcc overflow error and making the code broken.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Daniel <zpxu@ingenic.cn>
Cc: Shinya Kuribayashi <skuribay@pobox.com>
Cc: Xiangfu Liu <xiangfu@openmobilefree.net>

diff --git a/arch/mips/cpu/xburst/cpu.c b/arch/mips/cpu/xburst/cpu.c
index e97634159796547c5420708397e7f6e64351d11e..ddcbfaa47c93f858d7a68f6fb9812ed35cb57636 100644 (file)
--- a/arch/mips/cpu/xburst/cpu.c
+++ b/arch/mips/cpu/xburst/cpu.c
@@ -62,7 +62,7 @@ void __attribute__((weak)) _machine_restart(void)
 
        writew(100, &wdt->tdr); /* wdt_set_data(100) */
        writew(0, &wdt->tcnt); /* wdt_set_count(0); */
-       writew(TCU_TSSR_WDTSC, &tcu->tscr); /* tcu_start_wdt_clock */
+       writel(TCU_TSSR_WDTSC, &tcu->tscr); /* tcu_start_wdt_clock */
        writeb(readb(&wdt->tcer) | WDT_TCER_TCEN, &wdt->tcer); /* wdt start */
 
        while (1)