(*prcm)->prm_abbldo_mpu_setup,
(*prcm)->prm_abbldo_mpu_ctrl,
(*prcm)->prm_irqstatus_mpu_2,
- OMAP_ABB_MPU_TXDONE_MASK,
+ vcores->mpu.abb_tx_done_mask,
OMAP_ABB_FAST_OPP);
/* The .mm member is not used for the DRA7xx */
(*prcm)->prm_abbldo_mpu_setup,
(*prcm)->prm_abbldo_mpu_ctrl,
(*prcm)->prm_irqstatus_mpu_2,
- OMAP_ABB_MPU_TXDONE_MASK,
+ vcores->mpu.abb_tx_done_mask,
OMAP_ABB_FAST_OPP);
val = optimize_vcore_voltage(&vcores->mm);
.mpu.value = VDD_MPU_ES2,
.mpu.addr = SMPS_REG_ADDR_12_MPU,
.mpu.pmic = &palmas,
+ .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
.core.value = VDD_CORE_ES2,
.core.addr = SMPS_REG_ADDR_8_CORE,
.mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
.mpu.addr = TPS659038_REG_ADDR_SMPS12,
.mpu.pmic = &tps659038,
+ .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
.eve.value = VDD_EVE_DRA752,
.eve.efuse.reg = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
.mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
.mpu.addr = TPS65917_REG_ADDR_SMPS1,
.mpu.pmic = &tps659038,
+ .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
.core.value = VDD_CORE_DRA72x,
.core.efuse.reg = STD_FUSE_OPP_VMIN_CORE_NOM,
.mpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
.mpu.addr = TPS659038_REG_ADDR_SMPS12,
.mpu.pmic = &tps659038,
+ .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
.eve.value = VDD_EVE_DRA752,
.eve.efuse.reg = STD_FUSE_OPP_VMIN_DSPEVE_NOM,