]> git.sur5r.net Git - u-boot/commitdiff
DA8xx: switch an enum to defines for consistency
authorLaurence Withers <lwithers@guralp.com>
Mon, 18 Jul 2011 13:53:19 +0000 (09:53 -0400)
committerU-Boot <uboot@aari01-12.(none)>
Wed, 3 Aug 2011 10:49:19 +0000 (12:49 +0200)
There are two main sets of LPSC constants, depending on the processor
family.  The DA8xx constants were given in an enum whereas the non-DA8xx
constants were preprocessor defines. This commit switches the DA8xx
constants to defines for consistency.

Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
arch/arm/include/asm/arch-davinci/hardware.h

index d5d42118f08248d92848eac0f026acd7d8501b87..551b46935f17bbb0eba55d938c5d22d906ae6ace 100644 (file)
@@ -215,47 +215,46 @@ typedef volatile unsigned int *   dv_reg_p;
 
 #else /* CONFIG_SOC_DA8XX */
 
-enum davinci_lpsc_ids {
-       DAVINCI_LPSC_TPCC = 0,
-       DAVINCI_LPSC_TPTC0,
-       DAVINCI_LPSC_TPTC1,
-       DAVINCI_LPSC_AEMIF,
-       DAVINCI_LPSC_SPI0,
-       DAVINCI_LPSC_MMC_SD,
-       DAVINCI_LPSC_AINTC,
-       DAVINCI_LPSC_ARM_RAM_ROM,
-       DAVINCI_LPSC_SECCTL_KEYMGR,
-       DAVINCI_LPSC_UART0,
-       DAVINCI_LPSC_SCR0,
-       DAVINCI_LPSC_SCR1,
-       DAVINCI_LPSC_SCR2,
-       DAVINCI_LPSC_DMAX,
-       DAVINCI_LPSC_ARM,
-       DAVINCI_LPSC_GEM,
-       /* for LPSCs in PSC1, offset from 32 for differentiation */
-       DAVINCI_LPSC_PSC1_BASE = 32,
-       DAVINCI_LPSC_USB11,
-       DAVINCI_LPSC_USB20,
-       DAVINCI_LPSC_GPIO,
-       DAVINCI_LPSC_UHPI,
-       DAVINCI_LPSC_EMAC,
-       DAVINCI_LPSC_DDR_EMIF,
-       DAVINCI_LPSC_McASP0,
-       DAVINCI_LPSC_McASP1,
-       DAVINCI_LPSC_McASP2,
-       DAVINCI_LPSC_SPI1,
-       DAVINCI_LPSC_I2C1,
-       DAVINCI_LPSC_UART1,
-       DAVINCI_LPSC_UART2,
-       DAVINCI_LPSC_LCDC,
-       DAVINCI_LPSC_ePWM,
-       DAVINCI_LPSC_eCAP,
-       DAVINCI_LPSC_eQEP,
-       DAVINCI_LPSC_SCR_P0,
-       DAVINCI_LPSC_SCR_P1,
-       DAVINCI_LPSC_CR_P3,
-       DAVINCI_LPSC_L3_CBA_RAM
-};
+#define DAVINCI_LPSC_TPCC              0
+#define DAVINCI_LPSC_TPTC0             1
+#define DAVINCI_LPSC_TPTC1             2
+#define DAVINCI_LPSC_AEMIF             3
+#define DAVINCI_LPSC_SPI0              4
+#define DAVINCI_LPSC_MMC_SD            5
+#define DAVINCI_LPSC_AINTC             6
+#define DAVINCI_LPSC_ARM_RAM_ROM       7
+#define DAVINCI_LPSC_SECCTL_KEYMGR     8
+#define DAVINCI_LPSC_UART0             9
+#define DAVINCI_LPSC_SCR0              10
+#define DAVINCI_LPSC_SCR1              11
+#define DAVINCI_LPSC_SCR2              12
+#define DAVINCI_LPSC_DMAX              13
+#define DAVINCI_LPSC_ARM               14
+#define DAVINCI_LPSC_GEM               15
+
+/* for LPSCs in PSC1, offset from 32 for differentiation */
+#define DAVINCI_LPSC_PSC1_BASE         32
+#define DAVINCI_LPSC_USB11             (DAVINCI_LPSC_PSC1_BASE + 1)
+#define DAVINCI_LPSC_USB20             (DAVINCI_LPSC_PSC1_BASE + 2)
+#define DAVINCI_LPSC_GPIO              (DAVINCI_LPSC_PSC1_BASE + 3)
+#define DAVINCI_LPSC_UHPI              (DAVINCI_LPSC_PSC1_BASE + 4)
+#define DAVINCI_LPSC_EMAC              (DAVINCI_LPSC_PSC1_BASE + 5)
+#define DAVINCI_LPSC_DDR_EMIF          (DAVINCI_LPSC_PSC1_BASE + 6)
+#define DAVINCI_LPSC_McASP0            (DAVINCI_LPSC_PSC1_BASE + 7)
+#define DAVINCI_LPSC_McASP1            (DAVINCI_LPSC_PSC1_BASE + 8)
+#define DAVINCI_LPSC_McASP2            (DAVINCI_LPSC_PSC1_BASE + 9)
+#define DAVINCI_LPSC_SPI1              (DAVINCI_LPSC_PSC1_BASE + 10)
+#define DAVINCI_LPSC_I2C1              (DAVINCI_LPSC_PSC1_BASE + 11)
+#define DAVINCI_LPSC_UART1             (DAVINCI_LPSC_PSC1_BASE + 12)
+#define DAVINCI_LPSC_UART2             (DAVINCI_LPSC_PSC1_BASE + 13)
+#define DAVINCI_LPSC_LCDC              (DAVINCI_LPSC_PSC1_BASE + 14)
+#define DAVINCI_LPSC_ePWM              (DAVINCI_LPSC_PSC1_BASE + 15)
+#define DAVINCI_LPSC_eCAP              (DAVINCI_LPSC_PSC1_BASE + 16)
+#define DAVINCI_LPSC_eQEP              (DAVINCI_LPSC_PSC1_BASE + 17)
+#define DAVINCI_LPSC_SCR_P0            (DAVINCI_LPSC_PSC1_BASE + 18)
+#define DAVINCI_LPSC_SCR_P1            (DAVINCI_LPSC_PSC1_BASE + 19)
+#define DAVINCI_LPSC_CR_P3             (DAVINCI_LPSC_PSC1_BASE + 20)
+#define DAVINCI_LPSC_L3_CBA_RAM                (DAVINCI_LPSC_PSC1_BASE + 21)
 
 #endif /* CONFIG_SOC_DA8XX */