ppc4xx: Fix problem with ECC ordering for PPC4xx NDFC platforms

This patch now uses the correct ECC byte order (Smart Media - SMC)
to be used on the 4xx NAND FLASH driver. Without this patch we have
incompatible ECC byte ordering to the Linux kernel NDFC driver.

Please note that we also have to enable CONFIG_MTD_NAND_ECC_SMC in
drivers/mtd/nand/nand_ecc.c for correct operation. This is done with
a seperate patch.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>

diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c
index ba481ad5584c4394a0bc243649591b56c55c1833..971e2ae6c73e4e6ff53cc2dd29ea604772584e77 100644 (file)
--- a/cpu/ppc4xx/ndfc.c
+++ b/cpu/ppc4xx/ndfc.c
@@ -93,8 +93,8 @@ static int ndfc_calculate_ecc(struct mtd_info *mtdinfo,
 
        /* The NDFC uses Smart Media (SMC) bytes order
         */
-       ecc_code[0] = p[1];
-       ecc_code[1] = p[2];
+       ecc_code[0] = p[2];
+       ecc_code[1] = p[1];
        ecc_code[2] = p[3];
 
        return 0;