CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTP_DNS=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0x01C23000
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_SYS_NS16550=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_DWC_AHSATA=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHYLIB=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_EXT=y
CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5"
+CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_EXT=y
CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5"
+CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_EXT=y
CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="1:5"
+CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_NETDEVICES=y
CONFIG_SCSI_AHCI=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xfff3cf0c
# CONFIG_MMC is not set
CONFIG_SCSI=y
CONFIG_OF_LIBFDT=y
CONFIG_BOOTP_SUBNETMASK=y
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_I2C=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0x9
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_PHYLIB=y
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE011BFF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE011BFF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xFB000020
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_BOOTCOUNT_LIMIT=y
CONFIG_BOOTCOUNT_EXT=y
CONFIG_SYS_BOOTCOUNT_EXT_DEVPART="0:5"
+CONFIG_SYS_BOOTCOUNT_ADDR=0x7000A000
CONFIG_NETDEVICES=y
CONFIG_RTC_S35392A=y
CONFIG_USB=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_SPL_DM=y
CONFIG_SPL_DM_SEQ_ALIAS=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8
CONFIG_FPGA_SOCFPGA=y
CONFIG_DM_GPIO=y
CONFIG_DWAPB_GPIO=y
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_CMD_FS_GENERIC=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0x00900000
CONFIG_LED_STATUS=y
CONFIG_LED_STATUS0=y
CONFIG_LED_STATUS_BIT=0
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_BOOTP_GATEWAY=y
CONFIG_BOOTP_HOSTNAME=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xE0113FF8
# CONFIG_MMC is not set
CONFIG_MTD_NOR_FLASH=y
# CONFIG_PCI is not set
CONFIG_CMD_UBI=y
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_BOOTCOUNT_LIMIT=y
+CONFIG_SYS_BOOTCOUNT_ADDR=0xD2801FF8
CONFIG_FPGA_XILINX=y
CONFIG_SYS_I2C_DW=y
# CONFIG_MMC is not set
config SYS_BOOTCOUNT_ADDR
hex "RAM address used for reading and writing the boot counter"
- default 0x7000A000
- depends on BOOTCOUNT_EXT
+ default 0x44E3E000 if BOOTCOUNT_AM33XX
+ default 0xE0115FF8 if ARCH_LS1043A || ARCH_LS1021A
+ depends on BOOTCOUNT_AM33XX || BOOTCOUNT_GENERIC || BOOTCOUNT_EXT || \
+ BOOTCOUNT_I2C
help
Set the address used for reading and writing the boot counter.
#include <bootcount.h>
#include <linux/compiler.h>
-/*
- * Only override CONFIG_SYS_BOOTCOUNT_ADDR if not already defined. This
- * way, some boards can define it directly in their config header.
- */
-#if !defined(CONFIG_SYS_BOOTCOUNT_ADDR)
-
-#if defined(CONFIG_QE)
-#include <linux/immap_qe.h>
-#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_IMMR + 0x110000 + \
- QE_MURAM_SIZE - 2 * sizeof(u32))
-#endif /* defined(CONFIG_QE) */
-
-#endif /* !defined(CONFIG_SYS_BOOTCOUNT_ADDR) */
-
/* Now implement the generic default functions */
-#if defined(CONFIG_SYS_BOOTCOUNT_ADDR)
__weak void bootcount_store(ulong a)
{
void *reg = (void *)CONFIG_SYS_BOOTCOUNT_ADDR;
return raw_bootcount_load(reg);
#endif /* defined(CONFIG_SYS_BOOTCOUNT_SINGLEWORD) */
}
-#endif /* defined(CONFIG_SYS_BOOTCOUNT_ADDR) */
#define CONFIG_LCD_DT_SIMPLEFB
#define LCD_BPP LCD_COLOR32
-/* Bootcount using the RTC block */
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0x44E3E000
-
/* memory */
#define CONFIG_SYS_MALLOC_LEN (5 * 1024 * 1024)
#define CONFIG_SYS_INIT_SP_ADDR (0x8001ff00)
#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */
-#define CONFIG_SYS_BOOTCOUNT_ADDR DAVINCI_RTC_BASE
#ifndef __ASSEMBLY__
int calimain_get_osc_freq(void);
#define CONFIG_SYS_MALLOC_LEN (4 * SZ_1M)
/* Bootcounter */
-#define CONFIG_SYS_BOOTCOUNT_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_BOOTCOUNT_BE
/* FEC ethernet */
#define CONFIG_BCH
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0x7000A000
-
#endif /* __GE_BX50V3_CONFIG_H */
#define CONFIG_CONS_INDEX 0
#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c
#define CONFIG_MISC_INIT_R
#define CONFIG_SCSI_AHCI_PLAT
/* UBI Support */
#define CONFIG_MTD_PARTITIONS
-/* bootcount support */
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0x9
-
#define CONFIG_IMAGE_FORMAT_LEGACY
#endif /* __CONFIG_H */
#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_QRIO_BR_PRELIM /* QRIO Base Address */
#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_QRIO_OR_PRELIM /* QRIO Options */
-/* bootcounter in QRIO */
-#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_QRIO_BASE + 0x20)
-
#define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r function */
#define CONFIG_MISC_INIT_F
#define CONFIG_MISC_INIT_R
/*
* Bootcounter
*/
-/* last 2 lwords in OCRAM */
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfffffff8
#define CONFIG_SYS_BOOTCOUNT_BE
#endif /* __CONFIG_SOCFPGA_IS1_H__ */
/*
* Bootcounter
*/
-/* last 2 lwords in OCRAM */
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfffffff8
#define CONFIG_SYS_BOOTCOUNT_BE
/* Environment setting for SPI flash */
#endif
#define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */
-/*
- * RTC related defines. To use bootcount you must set bootlimit in the
- * environment to a non-zero value and enable CONFIG_BOOTCOUNT_LIMIT
- * in the board config.
- */
-#define CONFIG_SYS_BOOTCOUNT_ADDR 0x44E3E000
-
/*
* SPL related defines. The Public RAM memory map the ROM defines the
* area between 0x402F0400 and 0x4030B800 as a download area and
/* LED */
/* Bootcounter */
-#define CONFIG_SYS_BOOTCOUNT_ADDR IRAM_BASE_ADDR
#define CONFIG_SYS_BOOTCOUNT_BE
#endif /* __CONFIG_TQMA6_WRU4_H */
#define CONFIG_SYS_MALLOC_LEN (8 << 20)
#define CONFIG_SYS_LOAD_ADDR 0x00800000
-/* Use last 2 lwords in internal SRAM for bootcounter */
-#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SRAM_BASE + \
- CONFIG_SRAM_SIZE)
-
#define CONFIG_HOSTNAME x600
#define CONFIG_UBI_PART ubi0
#define CONFIG_UBIFS_VOLUME rootfs