]> git.sur5r.net Git - u-boot/commitdiff
board: ti: DRA7: Add DP83867 TI phy for rev c
authorDan Murphy <dmurphy@ti.com>
Wed, 30 Mar 2016 17:58:37 +0000 (12:58 -0500)
committerTom Rini <trini@konsulko.com>
Fri, 1 Apr 2016 21:18:07 +0000 (17:18 -0400)
Enable the TI DP83867 Giga bit phy on the
dra7 rev c board.  The rx and tx internal
delays are need for this board so the usage
of RGMII_ID is required.

Signed-off-by: Dan Murphy <dmurphy@ti.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
board/ti/dra7xx/evm.c
include/configs/dra7xx_evm.h

index 25f203124fd456ebca870f65d08ba6bc07ab06b1..9bd71d87baaa029efd722c847d3f18bd9f225bb7 100644 (file)
@@ -27,6 +27,7 @@
 #include <dwc3-uboot.h>
 #include <dwc3-omap-uboot.h>
 #include <ti-usb-phy-uboot.h>
+#include <miiphy.h>
 
 #include "mux_data.h"
 #include "../common/board_detect.h"
@@ -679,6 +680,11 @@ int board_eth_init(bd_t *bis)
        if (*omap_si_rev == DRA722_ES1_0)
                cpsw_data.active_slave = 1;
 
+       if (board_is_dra72x_revc_or_later()) {
+               cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
+               cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
+       }
+
        ret = cpsw_register(&cpsw_data);
        if (ret < 0)
                printf("Error %d registering CPSW switch\n", ret);
index c0795ab47f9c4f09cfcf4b33690f98a39aee3381..7734e8db943ed73f3192a87373a9bf37e3bde16a 100644 (file)
 #define CONFIG_MII                     /* Required in net/eth.c */
 #define CONFIG_PHY_GIGE                        /* per-board part of CPSW */
 #define CONFIG_PHYLIB
+#define CONFIG_PHY_TI
 
 /* SPI */
 #undef CONFIG_OMAP3_SPI