Enable the TI DP83867 Giga bit phy on the
dra7 rev c board.  The rx and tx internal
delays are need for this board so the usage
of RGMII_ID is required.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
 #include <dwc3-uboot.h>
 #include <dwc3-omap-uboot.h>
 #include <ti-usb-phy-uboot.h>
+#include <miiphy.h>
 
 #include "mux_data.h"
 #include "../common/board_detect.h"
        if (*omap_si_rev == DRA722_ES1_0)
                cpsw_data.active_slave = 1;
 
+       if (board_is_dra72x_revc_or_later()) {
+               cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
+               cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
+       }
+
        ret = cpsw_register(&cpsw_data);
        if (ret < 0)
                printf("Error %d registering CPSW switch\n", ret);
 
 #define CONFIG_MII                     /* Required in net/eth.c */
 #define CONFIG_PHY_GIGE                        /* per-board part of CPSW */
 #define CONFIG_PHYLIB
+#define CONFIG_PHY_TI
 
 /* SPI */
 #undef CONFIG_OMAP3_SPI