for full information about how to use this option (and also see
board/gateworks/gw_ventana/README for an example).
+config CMD_SPL_WRITE_SIZE
+ hex "Size of argument area"
+ depends on CMD_SPL
+ default 0x2000
+ help
+ This provides the size of the command-line argument area in NAND
+ flash used by Falcon-mode boot. See the documentation until CMD_SPL
+ for detail.
+
endmenu
menu "Environment commands"
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x40000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_NAND=y
# CONFIG_CMD_SETEXPR is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x40000
CONFIG_CMD_ASKENV=y
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x680000
+CONFIG_CMD_SPL_WRITE_SIZE=0x400
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_SPL_NAND_OFS=0x1100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_SPL_NAND_OFS=0x1100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_I2C=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_SPL_NAND_OFS=0x1100000
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00180000
+CONFIG_CMD_SPL_WRITE_SIZE=0x400
CONFIG_CMD_ASKENV=y
CONFIG_CRC32_VERIFY=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_SPL=y
+CONFIG_CMD_SPL_WRITE_SIZE=0x20000
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
CONFIG_CMD_PART=y
# CONFIG_CMD_IMLS is not set
CONFIG_CMD_SPL=y
CONFIG_CMD_SPL_NAND_OFS=0x00800000
+CONFIG_CMD_SPL_WRITE_SIZE=0x400
CONFIG_CMD_EEPROM=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MMC=y
#endif
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* !CONFIG_NAND */
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00300000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE CONFIG_SYS_NAND_BLOCK_SIZE
#endif
#define NANDARGS \
"mtdids=" MTDIDS_DEFAULT "\0" \
#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x00080000
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#define NANDARGS \
"mtdids=" MTDIDS_DEFAULT "\0" \
#endif
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* !CONFIG_NAND */
/* NAND */
#ifdef CONFIG_NAND
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x140000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif /* CONFIG_NAND */
#endif /* CONFIG_SPL_OS_BOOT */
#define CONFIG_SYS_NAND_ONFI_DETECTION
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x500000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
/* GPIO pin + bank to pin ID mapping */
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
/* SPL OS boot options */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
#undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* !CONFIG_NAND */
/* Falcon Mode */
#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
-#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
/* Falcon Mode - NAND support: args@17MB kernel@18MB */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M)
/* add FALCON boot mode */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000
#define CONFIG_SYS_SPL_ARGS_ADDR LINUX_BOOT_PARAM_ADDR
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x400
/* GPIO support */
#define CONFIG_DA8XX_GPIO
#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
-#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
/* Falcon Mode - MMC support: args@1MB kernel@2MB */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
#define CONFIG_SPL_FS_LOAD_ARGS_NAME "args"
#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
#define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000
-#define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K)
/* Falcon Mode - MMC support: args@1MB kernel@2MB */
#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* __CONFIG_H */
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
/* env defaults */
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* __CONFIG_H */
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif /* __CONFIG_H */
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
#endif
/* NAND: SPL falcon mode configs */
#ifdef CONFIG_SPL_OS_BOOT
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x2000
#endif
/*
"bootcmd=run nandboot\0"
/* SPL OS boot options */
-#define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000
#define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100)
CONFIG_CMDLINE_EDITING
CONFIG_CMDLINE_PS_SUPPORT
CONFIG_CMDLINE_TAG
-CONFIG_CMD_SPL_WRITE_SIZE
CONFIG_CMD_STRINGS
CONFIG_CMD_SX151X
CONFIG_CMD_TCA642X