ARM: zynq: ddrc: Setup half of memory only for ECC case

Setup half of memory from ram_size for ECC case.
All the time the same board can be configured
with or without ECC. Based on ECC case detection
use half of memory with the same configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

diff --git a/arch/arm/cpu/armv7/zynq/ddrc.c b/arch/arm/cpu/armv7/zynq/ddrc.c
index d74f8dbbc45dfb9f6440ea38fa44552404f436ef..5b20accbcb172d7e0e40dc7c92933f5123e1485a 100644 (file)
--- a/arch/arm/cpu/armv7/zynq/ddrc.c
+++ b/arch/arm/cpu/armv7/zynq/ddrc.c
@@ -42,6 +42,8 @@ void zynq_ddrc_init(void)
                 */
                /* cppcheck-suppress nullPointer */
                memset((void *)0, 0, 1 * 1024 * 1024);
+
+               gd->ram_size /= 2;
        } else {
                puts("ECC disabled ");
        }