Add NOR and SPI flash secure boot target for C29XPCIE board.
Signed-off-by: Po Liu <Po.Liu@freescale.com>
Signed-off-by: Mingkai.Hu <Mingkai.Hu@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
 F:     configs/C29XPCIE_defconfig
 F:     configs/C29XPCIE_NAND_defconfig
 F:     configs/C29XPCIE_SPIFLASH_defconfig
+F:     configs/C29XPCIE_NOR_SECBOOT_defconfig
+F:     configs/C29XPCIE_SPIFLASH_SECBOOT_defconfig
 
--- /dev/null
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
 
--- /dev/null
+CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,36BIT,SPIFLASH,SECURE_BOOT"
+CONFIG_PPC=y
+CONFIG_MPC85xx=y
+CONFIG_TARGET_C29XPCIE=y
 
 
 #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND
 
+#include <asm/fsl_secure_boot.h>
+
 #endif /* __CONFIG_H */