]> git.sur5r.net Git - u-boot/commitdiff
mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
authorVipul Kumar <vipul.kumar@xilinx.com>
Wed, 28 Feb 2018 10:23:29 +0000 (15:53 +0530)
committerMichal Simek <michal.simek@xilinx.com>
Thu, 1 Mar 2018 15:44:10 +0000 (16:44 +0100)
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
configs/xilinx_zynqmp_ep_defconfig
drivers/mmc/Kconfig
drivers/mmc/zynq_sdhci.c
include/configs/xilinx_zynqmp_ep.h

index 00db5e3607283a4e8f01e948e3a8d200772362ac..a0c8f28b971afa964064678987098c9ffdc56bb7 100644 (file)
@@ -62,6 +62,7 @@ CONFIG_MISC=y
 CONFIG_DM_MMC=y
 CONFIG_MMC_SDHCI=y
 CONFIG_MMC_SDHCI_ZYNQ=y
+CONFIG_ZYNQ_SDHCI_MIN_FREQ=100000
 CONFIG_NAND=y
 CONFIG_NAND_ARASAN=y
 CONFIG_SPI_FLASH=y
index 9967fffbd47d3663ddebddb6a971bc40a768decc..5f67e336dba58f04056087fc9d1741f09537e179 100644 (file)
@@ -487,6 +487,13 @@ config ZYNQ_SDHCI_MAX_FREQ
        help
          Set the maximum frequency of the controller.
 
+config ZYNQ_SDHCI_MIN_FREQ
+       int "Set the minimum frequency of the controller"
+       depends on MMC_SDHCI_ZYNQ
+       default 0
+       help
+         Set the minimum frequency of the controller.
+
 config MMC_SUNXI
        bool "Allwinner sunxi SD/MMC Host Controller support"
        depends on ARCH_SUNXI && !UART0_PORT_F
index 0fddb420dc0f55745d374ca8ae39d9c7b64907ee..414778cc4a7b4b7445399af94b7004e519b2f762 100644 (file)
 
 DECLARE_GLOBAL_DATA_PTR;
 
-#ifndef CONFIG_ZYNQ_SDHCI_MIN_FREQ
-# define CONFIG_ZYNQ_SDHCI_MIN_FREQ    0
-#endif
-
 struct arasan_sdhci_plat {
        struct mmc_config cfg;
        struct mmc mmc;
index a77eeea8a25100a6a003f70a097225550a1d86a7..a26377a41274258d2eba6d05e9661f0912800ee0 100644 (file)
@@ -13,7 +13,6 @@
 #ifndef __CONFIG_ZYNQMP_EP_H
 #define __CONFIG_ZYNQMP_EP_H
 
-#define CONFIG_ZYNQ_SDHCI_MIN_FREQ     (CONFIG_ZYNQ_SDHCI_MAX_FREQ >> 9)
 #define CONFIG_ZYNQ_EEPROM
 #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \
                                 ZYNQMP_USB1_XHCI_BASEADDR}