]> git.sur5r.net Git - u-boot/commitdiff
armv8: fsl-layerscape: Support loading 32-bit OS with PSCI enabled
authorAlison Wang <b18965@freescale.com>
Thu, 10 Nov 2016 02:49:05 +0000 (10:49 +0800)
committerYork Sun <york.sun@nxp.com>
Tue, 22 Nov 2016 19:40:24 +0000 (11:40 -0800)
As PSCI and secure monitor firmware framework are enabled, this patch is
to support loading 32-bit OS in such case. The default target exception
level returned to U-Boot is EL2, so the corresponding work to switch to
AArch32 EL2 and jump to 32-bit OS are done in U-Boot and secure firmware
together.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
arch/arm/cpu/armv8/sec_firmware_asm.S
arch/arm/cpu/armv8/transition.S
arch/arm/include/asm/system.h

index 0c6a46249a262b9619067bc133b135c8c1fd2f76..1b39f1d3227a4cb754660bd48fb92283d3793a6c 100644 (file)
@@ -50,4 +50,27 @@ ENTRY(_sec_firmware_support_psci_version)
        smc     #0
        ret
 ENDPROC(_sec_firmware_support_psci_version)
+
+/*
+ * Switch from AArch64 EL2 to AArch32 EL2
+ * @param inputs:
+ * x0: argument, zero
+ * x1: machine nr
+ * x2: fdt address
+ * x3: kernel entry point
+ * @param outputs for secure firmware:
+ * x0: function id
+ * x1: kernel entry point
+ * x2: machine nr
+ * x3: fdt address
+*/
+ENTRY(armv8_el2_to_aarch32)
+       mov     x0, x3
+       mov     x3, x2
+       mov     x2, x1
+       mov     x1, x0
+       ldr     x0, =0xc000ff04
+       smc     #0
+       ret
+ENDPROC(armv8_el2_to_aarch32)
 #endif
index bbccf2b3958d09a1c0c9c99b4548805421805355..adb9f3566bfc3f3fba690b4692400997a2b14468 100644 (file)
 ENTRY(armv8_switch_to_el2)
        switch_el x5, 1f, 0f, 0f
 0:
+       cmp x4, #ES_TO_AARCH64
+       b.eq 2f
+       /*
+        * When loading 32-bit kernel, it will jump
+        * to secure firmware again, and never return.
+        */
+       bl armv8_el2_to_aarch32
+2:
        /*
         * x3 is kernel entry point or switch_to_el1
         * if CONFIG_ARMV8_SWITCH_TO_EL1 is defined.
@@ -32,3 +40,7 @@ ENTRY(armv8_switch_to_el1)
        br x3
 1:     armv8_switch_to_el1_m x3, x4, x5
 ENDPROC(armv8_switch_to_el1)
+
+WEAK(armv8_el2_to_aarch32)
+       ret
+ENDPROC(armv8_el2_to_aarch32)
index 287ff5c7827455e9ea2d0b99d63d55f8340759c0..01efc43657f3257b6b3c7c4a4dced0dbc34b1fcb 100644 (file)
@@ -215,6 +215,8 @@ void armv8_switch_to_el2(u64 args, u64 mach_nr, u64 fdt_addr,
  */
 void armv8_switch_to_el1(u64 args, u64 mach_nr, u64 fdt_addr,
                         u64 entry_point, u64 es_flag);
+void armv8_el2_to_aarch32(u64 args, u64 mach_nr, u64 fdt_addr,
+                         u64 entry_point);
 void gic_init(void);
 void gic_send_sgi(unsigned long sgino);
 void wait_for_wakeup(void);