{CMD_BOOT_OFFSET, "BOOT_OFFSET", "Boot offset", },
{CMD_WRITE_DATA, "DATA", "Reg Write Data", },
{CMD_WRITE_CLR_BIT, "CLR_BIT", "Reg clear bit", },
+ {CMD_WRITE_SET_BIT, "SET_BIT", "Reg set bit", },
{CMD_CHECK_BITS_SET, "CHECK_BITS_SET", "Reg Check bits set", },
{CMD_CHECK_BITS_CLR, "CHECK_BITS_CLR", "Reg Check bits clr", },
{CMD_CSF, "CSF", "Command Sequence File", },
d->write_dcd_command.length = cpu_to_be16(4);
d->write_dcd_command.param = DCD_WRITE_CLR_BIT_PARAM;
break;
+ case CMD_WRITE_SET_BIT:
+ if ((d->write_dcd_command.tag == DCD_WRITE_DATA_COMMAND_TAG) &&
+ (d->write_dcd_command.param == DCD_WRITE_SET_BIT_PARAM))
+ break;
+ d = d2;
+ d->write_dcd_command.tag = DCD_WRITE_DATA_COMMAND_TAG;
+ d->write_dcd_command.length = cpu_to_be16(4);
+ d->write_dcd_command.param = DCD_WRITE_SET_BIT_PARAM;
+ break;
/*
* Check data command only supports one entry,
*/
break;
case CMD_WRITE_DATA:
case CMD_WRITE_CLR_BIT:
+ case CMD_WRITE_SET_BIT:
case CMD_CHECK_BITS_SET:
case CMD_CHECK_BITS_CLR:
value = get_cfg_value(token, name, lineno);
switch(*cmd) {
case CMD_WRITE_DATA:
case CMD_WRITE_CLR_BIT:
+ case CMD_WRITE_SET_BIT:
case CMD_CHECK_BITS_SET:
case CMD_CHECK_BITS_CLR:
#define DCD_VERSION 0x40
#define DCD_WRITE_DATA_COMMAND_TAG 0xCC
#define DCD_WRITE_DATA_PARAM 0x4
-#define DCD_WRITE_CLR_BIT_PARAM 0xC
+#define DCD_WRITE_CLR_BIT_PARAM 0xC
+#define DCD_WRITE_SET_BIT_PARAM 0x1C
#define DCD_CHECK_DATA_COMMAND_TAG 0xCF
#define DCD_CHECK_BITS_SET_PARAM 0x14
#define DCD_CHECK_BITS_CLR_PARAM 0x04
CMD_BOOT_OFFSET,
CMD_WRITE_DATA,
CMD_WRITE_CLR_BIT,
+ CMD_WRITE_SET_BIT,
CMD_CHECK_BITS_SET,
CMD_CHECK_BITS_CLR,
CMD_CSF,