]> git.sur5r.net Git - u-boot/commitdiff
AT91: Enable PLLB for USB
authorStelian Pop <stelian@popies.net>
Sat, 8 Nov 2008 23:14:46 +0000 (00:14 +0100)
committerJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Fri, 21 Nov 2008 00:41:14 +0000 (01:41 +0100)
At least some (old ?) versions of the AT91Bootstrap do not set up the
PLLB correctly to 48 MHz in order to make USB host function correctly.

This patch sets up the PLLB to the same values Linux uses, and makes USB
work ok on the following CPUs:
- AT91CAP9
- AT91SAM9260
- AT91SAM9263

This patch also defines CONFIG_USB_STORAGE and CONFIG_CMD_FAT for all
the relevant AT91CAP9/AT91SAM9 atmel boards.

Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
cpu/arm926ejs/at91/usb.c
include/configs/afeb9260.h
include/configs/at91cap9adk.h
include/configs/at91sam9260ek.h
include/configs/at91sam9261ek.h
include/configs/at91sam9263ek.h

index 7cb082db1be4dfe8a52f010d870aa50b1e2ba929..2f5c337474efa6cfbfbf51d0eed4e4208a5a45f6 100644 (file)
 
 int usb_cpu_init(void)
 {
+
+#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+    defined(CONFIG_AT91SAM9263)
+       /* Enable PLLB */
+       at91_sys_write(AT91_CKGR_PLLBR, CFG_AT91_PLLB);
+       while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != AT91_PMC_LOCKB)
+               ;
+#endif
+
        /* Enable USB host clock. */
        at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_UHP);
 #ifdef CONFIG_AT91SAM9261
@@ -51,6 +60,15 @@ int usb_cpu_stop(void)
 #else
        at91_sys_write(AT91_PMC_SCDR, AT91_PMC_UHP);
 #endif
+
+#if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \
+    defined(CONFIG_AT91SAM9263)
+       /* Disable PLLB */
+       at91_sys_write(AT91_CKGR_PLLBR, 0);
+       while ((at91_sys_read(AT91_PMC_SR) & AT91_PMC_LOCKB) != 0)
+               ;
+#endif
+
        return 0;
 }
 
index 755952fe21d3fc096c1e7904e45444be63104fe2..f077ad90f41a475ed56df77f38c85cd0332ecf04 100644 (file)
@@ -29,6 +29,7 @@
 /* ARM asynchronous clock */
 #define AT91_MAIN_CLOCK                18429952        /* from 18.432 MHz crystal */
 #define AT91_MASTER_CLOCK      89999598        /* peripheral = main / 2 */
+#define CFG_AT91_PLLB          0x107c3e18      /* PLLB settings for USB */
 #define CONFIG_SYS_HZ          1000000         /* 1us resolution */
 
 #define AT91_SLOW_CLOCK                32768   /* slow clock */
index 667e0496b600c09fcdc3fb3610c70574c783e5c9..aeb06ac64b6d37880a44e6c0caccf801f00d3054 100644 (file)
@@ -32,6 +32,7 @@
 #define AT91_MAIN_CLOCK                12000000        /* 12 MHz crystal */
 #define AT91_MASTER_CLOCK      100000000       /* peripheral */
 #define AT91_CPU_CLOCK         200000000       /* cpu */
+#define CFG_AT91_PLLB          0x10073e01      /* PLLB settings for USB */
 #define CONFIG_SYS_HZ          1000000         /* 1us resolution */
 
 #define AT91_SLOW_CLOCK                32768   /* slow clock */
 #define CONFIG_SYS_USB_OHCI_REGS_BASE          0x00700000      /* AT91_BASE_UHP */
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME          "at91cap9"
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     2
+#define CONFIG_USB_STORAGE             1
+#define CONFIG_CMD_FAT                 1
 
 #define CONFIG_SYS_LOAD_ADDR                   0x72000000      /* load address */
 
index 81c8d39b24dc766ac733d6f2480ff507a7a12fbc..fbc470fbe0a0ef7a92a30227bb8d3234390f895a 100644 (file)
@@ -32,6 +32,7 @@
 #define AT91_MAIN_CLOCK                18432000        /* 18.432 MHz crystal */
 #define AT91_MASTER_CLOCK      100000000       /* peripheral */
 #define AT91_CPU_CLOCK         200000000       /* cpu */
+#define CFG_AT91_PLLB          0x107c3e18      /* PLLB settings for USB */
 #define CONFIG_SYS_HZ          1000000         /* 1us resolution */
 
 #define AT91_SLOW_CLOCK                32768   /* slow clock */
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME          "at91sam9260"
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     2
 #define CONFIG_USB_STORAGE             1
+#define CONFIG_CMD_FAT                 1
 
 #define CONFIG_SYS_LOAD_ADDR                   0x22000000      /* load address */
 
index efe35a4b762755f4635ea202087a603b597dfc4f..bd668235d3889e76a702b322585cf7f9feb7e175 100644 (file)
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME          "at91sam9261"
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     2
 #define CONFIG_USB_STORAGE             1
+#define CONFIG_CMD_FAT                 1
 
 #define CONFIG_SYS_LOAD_ADDR                   0x22000000      /* load address */
 
index ef5b666311f5958193eb9f9687910e5387eed3af..a2b09ca9f7c1eb27894f99ec7025627ffbc02bf8 100644 (file)
@@ -32,6 +32,7 @@
 #define AT91_MAIN_CLOCK                16367660        /* 16.367 MHz crystal */
 #define AT91_MASTER_CLOCK      100000000       /* peripheral */
 #define AT91_CPU_CLOCK         200000000       /* cpu */
+#define CFG_AT91_PLLB          0x133a3e8d      /* PLLB settings for USB */
 #define CONFIG_SYS_HZ          1000000         /* 1us resolution */
 
 #define AT91_SLOW_CLOCK                32768   /* slow clock */
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME          "at91sam9263"
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS     2
 #define CONFIG_USB_STORAGE             1
+#define CONFIG_CMD_FAT                 1
 
 #define CONFIG_SYS_LOAD_ADDR                   0x22000000      /* load address */