return fref / div;
}
+int imx_set_perclk(enum mxc_clock clk, bool from_upll, unsigned int freq)
+{
+ struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
+ ulong fref = from_upll ? imx_get_upllclk() : imx_get_ahbclk();
+ ulong div = (fref + freq - 1) / freq;
+
+ if (clk > MXC_UART_CLK || !div || --div > CCM_PERCLK_MASK)
+ return -EINVAL;
+
+ clrsetbits_le32(&ccm->pcdr[CCM_PERCLK_REG(clk)],
+ CCM_PERCLK_MASK << CCM_PERCLK_SHIFT(clk),
+ div << CCM_PERCLK_SHIFT(clk));
+ if (from_upll)
+ setbits_le32(&ccm->mcr, 1 << clk);
+ else
+ clrbits_le32(&ccm->mcr, 1 << clk);
+ return 0;
+}
+
unsigned int mxc_get_clock(enum mxc_clock clk)
{
if (clk >= MXC_CLK_NUM)
MXC_CLK_NUM
};
+int imx_set_perclk(enum mxc_clock clk, bool from_upll, unsigned int freq);
unsigned int mxc_get_clock(enum mxc_clock clk);
#define imx_get_uartclk() mxc_get_clock(MXC_UART_CLK)