x86: baytrail: Update UPD setting for FSP Gold4 release

BayTrail FSP Gold4 release adds one UPD parameter to control IGD
enable/disable.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

diff --git a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h
index 82862f626d37efe9fa81c008ed92deb5ee7bd883..eb0d5062164ca623ef584bb53829a9aa0d7488e1 100644 (file)
--- a/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h
+++ b/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h
@@ -75,7 +75,8 @@ struct __packed upd_region {
        uint8_t emmc45_ddr50_enabled;           /* Offset 0x0051 */
        uint8_t emmc45_hs200_enabled;           /* Offset 0x0052 */
        uint8_t emmc45_retune_timer_value;      /* Offset 0x0053 */
-       uint8_t unused_upd_space1[156];         /* Offset 0x0054 */
+       uint8_t enable_igd;                     /* Offset 0x0054 */
+       uint8_t unused_upd_space1[155];         /* Offset 0x0055 */
        struct memory_down_data memory_params;  /* Offset 0x00f0 */
        uint16_t terminator;                    /* Offset 0x0100 */
 };