-/*
- * Device Tree Source for UniPhier LD11 Global Board
- *
- * Copyright (C) 2016-2017 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- * Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier LD11 Global Board
+//
+// Copyright (C) 2016-2017 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+// Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
/dts-v1/;
+#include <dt-bindings/gpio/uniphier-gpio.h>
#include "uniphier-ld11.dtsi"
/ {
device_type = "memory";
reg = <0 0x80000000 0 0x40000000>;
};
+
+ dvdd_reg: reg-fixed {
+ compatible = "regulator-fixed";
+ regulator-name = "DVDD";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ amp_vcc_reg: reg-fixed {
+ compatible = "regulator-fixed";
+ regulator-name = "AMP_VCC";
+ regulator-min-microvolt = <24000000>;
+ regulator-max-microvolt = <24000000>;
+ };
+
+ sound {
+ compatible = "audio-graph-card";
+ label = "UniPhier LD11";
+ widgets = "Headphone", "Headphone Jack";
+ dais = <&i2s_port2
+ &i2s_port3
+ &i2s_port4
+ &spdif_port0
+ &comp_spdif_port0>;
+ };
+
+ spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+
+ port@0 {
+ spdif_tx: endpoint {
+ remote-endpoint = <&spdif_hiecout1>;
+ };
+ };
+ };
+
+ comp-spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+
+ port@0 {
+ comp_spdif_tx: endpoint {
+ remote-endpoint = <&comp_spdif_hiecout1>;
+ };
+ };
+ };
};
&serial0 {
status = "okay";
};
+&i2s_hpcmout1 {
+ dai-format = "i2s";
+ remote-endpoint = <&tas_speaker>;
+};
+
+&spdif_hiecout1 {
+ remote-endpoint = <&spdif_tx>;
+};
+
+&comp_spdif_hiecout1 {
+ remote-endpoint = <&comp_spdif_tx>;
+};
+
&i2c0 {
status = "okay";
+ tas5707a@1d {
+ compatible = "ti,tas5711";
+ reg = <0x1d>;
+ reset-gpios = <&gpio UNIPHIER_GPIO_PORT(23, 4) GPIO_ACTIVE_LOW>;
+ pdn-gpios = <&gpio UNIPHIER_GPIO_PORT(23, 5) GPIO_ACTIVE_LOW>;
+ #sound-dai-cells = <0>;
+ AVDD-supply = <&dvdd_reg>;
+ DVDD-supply = <&dvdd_reg>;
+ PVDD_A-supply = <&_vcc_reg>;
+ PVDD_B-supply = <&_vcc_reg>;
+ PVDD_C-supply = <&_vcc_reg>;
+ PVDD_D-supply = <&_vcc_reg>;
+
+ port@0 {
+ tas_speaker: endpoint {
+ dai-format = "i2s";
+ remote-endpoint = <&i2s_hpcmout1>;
+ };
+ };
+ };
+
eeprom@50 {
compatible = "st,24c64", "atmel,24c64", "i2c-eeprom";
reg = <0x50>;
status = "okay";
};
+ð {
+ status = "okay";
+ phy-handle = <ðphy>;
+};
+
+&mdio {
+ ethphy: ethphy@1 {
+ reg = <1>;
+ };
+};
+
&nand {
status = "okay";
};
-/*
- * Device Tree Source for UniPhier LD11 Reference Board
- *
- * Copyright (C) 2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier LD11 Reference Board
+//
+// Copyright (C) 2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-ld11.dtsi"
&usb2 {
status = "okay";
};
+
+ð {
+ status = "okay";
+ phy-handle = <ðphy>;
+};
+
+&mdio {
+ ethphy: ethphy@1 {
+ reg = <1>;
+ };
+};
-/*
- * Device Tree Source for UniPhier LD11 SoC
- *
- * Copyright (C) 2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier LD11 SoC
+//
+// Copyright (C) 2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/uniphier-gpio.h>
<21 217 3>;
};
+ audio@56000000 {
+ compatible = "socionext,uniphier-ld11-aio";
+ reg = <0x56000000 0x80000>;
+ interrupts = <0 144 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_aout1>,
+ <&pinctrl_aoutiec1>;
+ clock-names = "aio";
+ clocks = <&sys_clk 40>;
+ reset-names = "aio";
+ resets = <&sys_rst 40>;
+ #sound-dai-cells = <1>;
+ socionext,syscon = <&soc_glue>;
+
+ i2s_port0: port@0 {
+ i2s_hdmi: endpoint {
+ };
+ };
+
+ i2s_port1: port@1 {
+ i2s_pcmin2: endpoint {
+ };
+ };
+
+ i2s_port2: port@2 {
+ i2s_line: endpoint {
+ dai-format = "i2s";
+ remote-endpoint = <&evea_line>;
+ };
+ };
+
+ i2s_port3: port@3 {
+ i2s_hpcmout1: endpoint {
+ };
+ };
+
+ i2s_port4: port@4 {
+ i2s_hp: endpoint {
+ dai-format = "i2s";
+ remote-endpoint = <&evea_hp>;
+ };
+ };
+
+ spdif_port0: port@5 {
+ spdif_hiecout1: endpoint {
+ };
+ };
+
+ src_port0: port@6 {
+ i2s_epcmout2: endpoint {
+ };
+ };
+
+ src_port1: port@7 {
+ i2s_epcmout3: endpoint {
+ };
+ };
+
+ comp_spdif_port0: port@8 {
+ comp_spdif_hiecout1: endpoint {
+ };
+ };
+ };
+
+ codec@57900000 {
+ compatible = "socionext,uniphier-evea";
+ reg = <0x57900000 0x1000>;
+ clock-names = "evea", "exiv";
+ clocks = <&sys_clk 41>, <&sys_clk 42>;
+ reset-names = "evea", "exiv", "adamv";
+ resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>;
+ #sound-dai-cells = <1>;
+
+ port@0 {
+ evea_line: endpoint {
+ remote-endpoint = <&i2s_line>;
+ };
+ };
+
+ port@1 {
+ evea_hp: endpoint {
+ remote-endpoint = <&i2s_hp>;
+ };
+ };
+ };
+
adamv@57920000 {
compatible = "socionext,uniphier-ld11-adamv",
"simple-mfd", "syscon";
};
};
- soc-glue@5f800000 {
+ soc_glue: soc-glue@5f800000 {
compatible = "socionext,uniphier-ld11-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
};
};
+ eth: ethernet@65000000 {
+ compatible = "socionext,uniphier-ld11-ave4";
+ status = "disabled";
+ reg = <0x65000000 0x8500>;
+ interrupts = <0 66 4>;
+ clocks = <&sys_clk 6>;
+ resets = <&sys_rst 6>;
+ phy-mode = "rmii";
+ local-mac-address = [00 00 00 00 00 00];
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
nand: nand@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
};
#include "uniphier-pinctrl.dtsi"
+
+&pinctrl_aoutiec1 {
+ drive-strength = <4>; /* default: 4mA */
+
+ ao1arc {
+ pins = "AO1ARC";
+ drive-strength = <8>; /* 8mA */
+ };
+};
-/*
- * Device Tree Source for UniPhier LD20 Global Board
- *
- * Copyright (C) 2015-2017 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- * Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier LD20 Global Board
+//
+// Copyright (C) 2015-2017 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+// Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
/dts-v1/;
+#include <dt-bindings/gpio/uniphier-gpio.h>
#include "uniphier-ld20.dtsi"
/ {
device_type = "memory";
reg = <0 0x80000000 0 0xc0000000>;
};
+
+ dvdd_reg: reg-fixed {
+ compatible = "regulator-fixed";
+ regulator-name = "DVDD";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ amp_vcc_reg: reg-fixed {
+ compatible = "regulator-fixed";
+ regulator-name = "AMP_VCC";
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ sound {
+ compatible = "audio-graph-card";
+ label = "UniPhier LD20";
+ widgets = "Headphone", "Headphone Jack";
+ dais = <&i2s_port2
+ &i2s_port3
+ &i2s_port4
+ &spdif_port0
+ &comp_spdif_port0>;
+ };
+
+ spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+
+ port@0 {
+ spdif_tx: endpoint {
+ remote-endpoint = <&spdif_hiecout1>;
+ };
+ };
+ };
+
+ comp-spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+
+ port@0 {
+ comp_spdif_tx: endpoint {
+ remote-endpoint = <&comp_spdif_hiecout1>;
+ };
+ };
+ };
};
&serial0 {
status = "okay";
};
+&i2s_hpcmout1 {
+ dai-format = "i2s";
+ remote-endpoint = <&tas_speaker>;
+};
+
+&spdif_hiecout1 {
+ remote-endpoint = <&spdif_tx>;
+};
+
+&comp_spdif_hiecout1 {
+ remote-endpoint = <&comp_spdif_tx>;
+};
+
&i2c0 {
status = "okay";
+
+ tas5707@1b {
+ compatible = "ti,tas5711";
+ reg = <0x1b>;
+ reset-gpios = <&gpio UNIPHIER_GPIO_PORT(0, 0) GPIO_ACTIVE_LOW>;
+ pdn-gpios = <&gpio UNIPHIER_GPIO_PORT(0, 1) GPIO_ACTIVE_LOW>;
+ #sound-dai-cells = <0>;
+ AVDD-supply = <&dvdd_reg>;
+ DVDD-supply = <&dvdd_reg>;
+ PVDD_A-supply = <&_vcc_reg>;
+ PVDD_B-supply = <&_vcc_reg>;
+ PVDD_C-supply = <&_vcc_reg>;
+ PVDD_D-supply = <&_vcc_reg>;
+
+ port@0 {
+ tas_speaker: endpoint {
+ dai-format = "i2s";
+ remote-endpoint = <&i2s_hpcmout1>;
+ };
+ };
+ };
+};
+
+ð {
+ status = "okay";
+ phy-mode = "rmii";
+ pinctrl-0 = <&pinctrl_ether_rmii>;
+ phy-handle = <ðphy>;
+};
+
+&mdio {
+ ethphy: ethphy@1 {
+ reg = <1>;
+ };
};
&nand {
-/*
- * Device Tree Source for UniPhier LD20 Reference Board
- *
- * Copyright (C) 2015-2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier LD20 Reference Board
+//
+// Copyright (C) 2015-2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-ld20.dtsi"
&i2c0 {
status = "okay";
};
+
+ð {
+ status = "okay";
+ phy-handle = <ðphy>;
+};
+
+&mdio {
+ ethphy: ethphy@0 {
+ reg = <0>;
+ };
+};
-/*
- * Device Tree Source for UniPhier LD20 SoC
- *
- * Copyright (C) 2015-2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier LD20 SoC
+//
+// Copyright (C) 2015-2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/uniphier-gpio.h>
<21 217 3>;
};
+ audio@56000000 {
+ compatible = "socionext,uniphier-ld20-aio";
+ reg = <0x56000000 0x80000>;
+ interrupts = <0 144 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_aout1>,
+ <&pinctrl_aoutiec1>;
+ clock-names = "aio";
+ clocks = <&sys_clk 40>;
+ reset-names = "aio";
+ resets = <&sys_rst 40>;
+ #sound-dai-cells = <1>;
+ socionext,syscon = <&soc_glue>;
+
+ i2s_port0: port@0 {
+ i2s_hdmi: endpoint {
+ };
+ };
+
+ i2s_port1: port@1 {
+ i2s_pcmin2: endpoint {
+ };
+ };
+
+ i2s_port2: port@2 {
+ i2s_line: endpoint {
+ dai-format = "i2s";
+ remote-endpoint = <&evea_line>;
+ };
+ };
+
+ i2s_port3: port@3 {
+ i2s_hpcmout1: endpoint {
+ };
+ };
+
+ i2s_port4: port@4 {
+ i2s_hp: endpoint {
+ dai-format = "i2s";
+ remote-endpoint = <&evea_hp>;
+ };
+ };
+
+ spdif_port0: port@5 {
+ spdif_hiecout1: endpoint {
+ };
+ };
+
+ src_port0: port@6 {
+ i2s_epcmout2: endpoint {
+ };
+ };
+
+ src_port1: port@7 {
+ i2s_epcmout3: endpoint {
+ };
+ };
+
+ comp_spdif_port0: port@8 {
+ comp_spdif_hiecout1: endpoint {
+ };
+ };
+ };
+
+ codec@57900000 {
+ compatible = "socionext,uniphier-evea";
+ reg = <0x57900000 0x1000>;
+ clock-names = "evea", "exiv";
+ clocks = <&sys_clk 41>, <&sys_clk 42>;
+ reset-names = "evea", "exiv", "adamv";
+ resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>;
+ #sound-dai-cells = <1>;
+
+ port@0 {
+ evea_line: endpoint {
+ remote-endpoint = <&i2s_line>;
+ };
+ };
+
+ port@1 {
+ evea_hp: endpoint {
+ remote-endpoint = <&i2s_hp>;
+ };
+ };
+ };
+
adamv@57920000 {
compatible = "socionext,uniphier-ld20-adamv",
"simple-mfd", "syscon";
cap-sd-highspeed;
};
- soc-glue@5f800000 {
+ soc_glue: soc-glue@5f800000 {
compatible = "socionext,uniphier-ld20-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
};
};
+ eth: ethernet@65000000 {
+ compatible = "socionext,uniphier-ld20-ave4";
+ status = "disabled";
+ reg = <0x65000000 0x8500>;
+ interrupts = <0 66 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ether_rgmii>;
+ clocks = <&sys_clk 6>;
+ resets = <&sys_rst 6>;
+ phy-mode = "rgmii";
+ local-mac-address = [00 00 00 00 00 00];
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
usb: usb@65b00000 {
compatible = "socionext,uniphier-ld20-dwc3";
reg = <0x65b00000 0x1000>;
};
#include "uniphier-pinctrl.dtsi"
+
+&pinctrl_aout1 {
+ drive-strength = <4>; /* default: 3.5mA */
+
+ ao1dacck {
+ pins = "AO1DACCK";
+ drive-strength = <5>; /* 5mA */
+ };
+};
+
+&pinctrl_aoutiec1 {
+ drive-strength = <4>; /* default: 3.5mA */
+
+ ao1arc {
+ pins = "AO1ARC";
+ drive-strength = <11>; /* 11mA */
+ };
+};
-/*
- * Device Tree Source for UniPhier LD4 Reference Board
- *
- * Copyright (C) 2015-2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier LD4 Reference Board
+//
+// Copyright (C) 2015-2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-ld4.dtsi"
-/*
- * Device Tree Source for UniPhier LD4 SoC
- *
- * Copyright (C) 2015-2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier LD4 SoC
+//
+// Copyright (C) 2015-2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/uniphier-gpio.h>
-/*
- * Device Tree Source for UniPhier LD6b Reference Board
- *
- * Copyright (C) 2015-2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier LD6b Reference Board
+//
+// Copyright (C) 2015-2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-ld6b.dtsi"
status = "okay";
};
+ð {
+ status = "okay";
+ phy-handle = <ðphy>;
+};
+
+&mdio {
+ ethphy: ethphy@0 {
+ reg = <0>;
+ };
+};
+
&usb0 {
status = "okay";
};
-/*
- * Device Tree Source for UniPhier LD6b SoC
- *
- * Copyright (C) 2015-2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier LD6b SoC
+//
+// Copyright (C) 2015-2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/*
* LD6b consists of two silicon dies: D-chip and A-chip.
-/*
- * Device Tree Source for UniPhier SoCs default pinctrl settings
- *
- * Copyright (C) 2015-2017 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier SoCs default pinctrl settings
+//
+// Copyright (C) 2015-2017 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
&pinctrl {
pinctrl_aout: aout {
function = "aout";
};
+ pinctrl_ain1: ain1 {
+ groups = "ain1";
+ function = "ain1";
+ };
+
+ pinctrl_ain2: ain2 {
+ groups = "ain2";
+ function = "ain2";
+ };
+
+ pinctrl_ainiec1: ainiec1 {
+ groups = "ainiec1";
+ function = "ainiec1";
+ };
+
+ pinctrl_aout1: aout1 {
+ groups = "aout1";
+ function = "aout1";
+ };
+
+ pinctrl_aout2: aout2 {
+ groups = "aout2";
+ function = "aout2";
+ };
+
+ pinctrl_aout3: aout3 {
+ groups = "aout3";
+ function = "aout3";
+ };
+
+ pinctrl_aoutiec1: aoutiec1 {
+ groups = "aoutiec1";
+ function = "aoutiec1";
+ };
+
+ pinctrl_aoutiec2: aoutiec2 {
+ groups = "aoutiec2";
+ function = "aoutiec2";
+ };
+
pinctrl_emmc: emmc {
groups = "emmc", "emmc_dat8";
function = "emmc";
function = "ether_rmii";
};
+ pinctrl_ether1_rgmii: ether1-rgmii {
+ groups = "ether1_rgmii";
+ function = "ether1_rgmii";
+ };
+
+ pinctrl_ether1_rmii: ether1-rmii {
+ groups = "ether1_rmii";
+ function = "ether1_rmii";
+ };
+
pinctrl_i2c0: i2c0 {
groups = "i2c0";
function = "i2c0";
-/*
- * Device Tree Source for UniPhier Pro4 Ace Board
- *
- * Copyright (C) 2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier Pro4 Ace Board
+//
+// Copyright (C) 2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-pro4.dtsi"
status = "okay";
};
+ð {
+ status = "okay";
+ phy-handle = <ðphy>;
+};
+
+&mdio {
+ ethphy: ethphy@1 {
+ reg = <1>;
+ };
+};
+
&usb2 {
status = "okay";
};
-/*
- * Device Tree Source for UniPhier Pro4 Reference Board
- *
- * Copyright (C) 2015-2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier Pro4 Reference Board
+//
+// Copyright (C) 2015-2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-pro4.dtsi"
status = "okay";
};
+ð {
+ status = "okay";
+ phy-handle = <ðphy>;
+};
+
+&mdio {
+ ethphy: ethphy@0 {
+ reg = <0>;
+ };
+};
+
&usb0 {
status = "okay";
};
-/*
- * Device Tree Source for UniPhier Pro4 Sanji Board
- *
- * Copyright (C) 2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier Pro4 Sanji Board
+//
+// Copyright (C) 2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-pro4.dtsi"
status = "okay";
};
+ð {
+ status = "okay";
+ phy-handle = <ðphy>;
+};
+
+&mdio {
+ ethphy: ethphy@1 {
+ reg = <1>;
+ };
+};
+
&usb2 {
status = "okay";
};
-/*
- * Device Tree Source for UniPhier Pro4 SoC
- *
- * Copyright (C) 2015-2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier Pro4 SoC
+//
+// Copyright (C) 2015-2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/uniphier-gpio.h>
};
};
+ eth: ethernet@65000000 {
+ compatible = "socionext,uniphier-pro4-ave4";
+ status = "disabled";
+ reg = <0x65000000 0x8500>;
+ interrupts = <0 66 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ether_rgmii>;
+ clocks = <&sys_clk 6>;
+ resets = <&sys_rst 6>;
+ phy-mode = "rgmii";
+ local-mac-address = [00 00 00 00 00 00];
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
usb0: usb@65b00000 {
compatible = "socionext,uniphier-pro4-dwc3";
status = "disabled";
-/*
- * Device Tree Source for UniPhier Pro5 SoC
- *
- * Copyright (C) 2015-2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier Pro5 SoC
+//
+// Copyright (C) 2015-2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/ {
compatible = "socionext,uniphier-pro5";
-/*
- * Device Tree Source for UniPhier PXs2 Gentil Board
- *
- * Copyright (C) 2015-2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier PXs2 Gentil Board
+//
+// Copyright (C) 2015-2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-pxs2.dtsi"
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
+
+ sound {
+ compatible = "audio-graph-card";
+ label = "UniPhier PXs2";
+ dais = <&i2s_port2>;
+ };
};
&serial2 {
};
};
+&i2s_aux {
+ dai-format = "i2s";
+ remote-endpoint = <&wm_speaker>;
+};
+
&i2c2 {
status = "okay";
+
+ wm8960@1a {
+ compatible = "wlf,wm8960";
+ reg = <0x1a>;
+ #sound-dai-cells = <0>;
+
+ port@0 {
+ wm_speaker: endpoint {
+ dai-format = "i2s";
+ remote-endpoint = <&i2s_aux>;
+ };
+ };
+ };
};
&emmc {
status = "okay";
};
+ð {
+ status = "okay";
+ phy-handle = <ðphy>;
+};
+
+&mdio {
+ ethphy: ethphy@1 {
+ reg = <1>;
+ };
+};
+
&usb0 {
status = "okay";
};
-/*
- * Device Tree Source for UniPhier PXs2 Vodka Board
- *
- * Copyright (C) 2015-2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier PXs2 Vodka Board
+//
+// Copyright (C) 2015-2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-pxs2.dtsi"
device_type = "memory";
reg = <0x80000000 0x80000000>;
};
+
+ sound {
+ compatible = "audio-graph-card";
+ label = "UniPhier PXs2";
+ dais = <&spdif_port0
+ &comp_spdif_port0>;
+ };
+
+ spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+
+ port@0 {
+ spdif_tx: endpoint {
+ remote-endpoint = <&spdif_hiecout1>;
+ };
+ };
+ };
+
+ comp-spdif-out {
+ compatible = "linux,spdif-dit";
+ #sound-dai-cells = <0>;
+
+ port@0 {
+ comp_spdif_tx: endpoint {
+ remote-endpoint = <&comp_spdif_hiecout1>;
+ };
+ };
+ };
};
&serial2 {
status = "okay";
};
+&spdif_hiecout1 {
+ remote-endpoint = <&spdif_tx>;
+};
+
+&comp_spdif_hiecout1 {
+ remote-endpoint = <&comp_spdif_tx>;
+};
+
&i2c0 {
status = "okay";
};
status = "okay";
};
+ð {
+ status = "okay";
+ phy-handle = <ðphy>;
+};
+
+&mdio {
+ ethphy: ethphy@1 {
+ reg = <1>;
+ };
+};
+
&usb0 {
status = "okay";
};
-/*
- * Device Tree Source for UniPhier PXs2 SoC
- *
- * Copyright (C) 2015-2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier PXs2 SoC
+//
+// Copyright (C) 2015-2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/uniphier-gpio.h>
#include <dt-bindings/thermal/thermal.h>
<21 217 3>;
};
+ audio@56000000 {
+ compatible = "socionext,uniphier-pxs2-aio";
+ reg = <0x56000000 0x80000>;
+ interrupts = <0 144 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ain1>,
+ <&pinctrl_ain2>,
+ <&pinctrl_ainiec1>,
+ <&pinctrl_aout2>,
+ <&pinctrl_aout3>,
+ <&pinctrl_aoutiec1>,
+ <&pinctrl_aoutiec2>;
+ clock-names = "aio";
+ clocks = <&sys_clk 40>;
+ reset-names = "aio";
+ resets = <&sys_rst 40>;
+ #sound-dai-cells = <1>;
+ socionext,syscon = <&soc_glue>;
+
+ i2s_port0: port@0 {
+ i2s_hdmi: endpoint {
+ };
+ };
+
+ i2s_port1: port@1 {
+ i2s_line: endpoint {
+ };
+ };
+
+ i2s_port2: port@2 {
+ i2s_aux: endpoint {
+ };
+ };
+
+ spdif_port0: port@3 {
+ spdif_hiecout1: endpoint {
+ };
+ };
+
+ spdif_port1: port@4 {
+ spdif_iecout1: endpoint {
+ };
+ };
+
+ comp_spdif_port0: port@5 {
+ comp_spdif_hiecout1: endpoint {
+ };
+ };
+
+ comp_spdif_port1: port@6 {
+ comp_spdif_iecout1: endpoint {
+ };
+ };
+ };
+
i2c0: i2c@58780000 {
compatible = "socionext,uniphier-fi2c";
status = "disabled";
sd-uhs-sdr50;
};
- soc-glue@5f800000 {
+ soc_glue: soc-glue@5f800000 {
compatible = "socionext,uniphier-pxs2-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
};
};
+ eth: ethernet@65000000 {
+ compatible = "socionext,uniphier-pxs2-ave4";
+ status = "disabled";
+ reg = <0x65000000 0x8500>;
+ interrupts = <0 66 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ether_rgmii>;
+ clocks = <&sys_clk 6>;
+ resets = <&sys_rst 6>;
+ phy-mode = "rgmii";
+ local-mac-address = [00 00 00 00 00 00];
+
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
usb0: usb@65b00000 {
compatible = "socionext,uniphier-pxs2-dwc3";
status = "disabled";
-/*
- * Device Tree Source for UniPhier PXs3 Reference Board
- *
- * Copyright (C) 2017 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier PXs3 Reference Board
+//
+// Copyright (C) 2017 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-pxs3.dtsi"
status = "okay";
};
+ð0 {
+ status = "okay";
+ phy-handle = <ðphy0>;
+};
+
+&mdio0 {
+ ethphy0: ethphy@0 {
+ reg = <0>;
+ };
+};
+
+ð1 {
+ status = "okay";
+ phy-handle = <ðphy1>;
+};
+
+&mdio1 {
+ ethphy1: ethphy@0 {
+ reg = <0>;
+ };
+};
+
&usb0 {
status = "okay";
};
-/*
- * Device Tree Source for UniPhier PXs3 SoC
- *
- * Copyright (C) 2017 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier PXs3 SoC
+//
+// Copyright (C) 2017 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/gpio/uniphier-gpio.h>
cap-sd-highspeed;
};
- soc-glue@5f800000 {
+ soc_glue: soc-glue@5f800000 {
compatible = "socionext,uniphier-pxs3-soc-glue",
"simple-mfd", "syscon";
reg = <0x5f800000 0x2000>;
};
};
+ eth0: ethernet@65000000 {
+ compatible = "socionext,uniphier-pxs3-ave4";
+ status = "disabled";
+ reg = <0x65000000 0x8500>;
+ interrupts = <0 66 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ether_rgmii>;
+ clocks = <&sys_clk 6>;
+ resets = <&sys_rst 6>;
+ phy-mode = "rgmii";
+ local-mac-address = [00 00 00 00 00 00];
+
+ mdio0: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ eth1: ethernet@65200000 {
+ compatible = "socionext,uniphier-pxs3-ave4";
+ status = "disabled";
+ reg = <0x65200000 0x8500>;
+ interrupts = <0 67 4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ether1_rgmii>;
+ clocks = <&sys_clk 7>;
+ resets = <&sys_rst 7>;
+ phy-mode = "rgmii";
+ local-mac-address = [00 00 00 00 00 00];
+
+ mdio1: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
usb0: usb@65b00000 {
compatible = "socionext,uniphier-pxs3-dwc3";
status = "disabled";
-/*
- * Device Tree Source for UniPhier Reference Daughter Board
- *
- * Copyright (C) 2015-2017 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier Reference Daughter Board
+//
+// Copyright (C) 2015-2017 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
&i2c0 {
eeprom@50 {
-/*
- * Device Tree Source for UniPhier sLD8 Reference Board
- *
- * Copyright (C) 2015-2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier sLD8 Reference Board
+//
+// Copyright (C) 2015-2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
/dts-v1/;
#include "uniphier-sld8.dtsi"
-/*
- * Device Tree Source for UniPhier sLD8 SoC
- *
- * Copyright (C) 2015-2016 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier sLD8 SoC
+//
+// Copyright (C) 2015-2016 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
#include <dt-bindings/gpio/uniphier-gpio.h>
-/*
- * Device Tree Source for UniPhier Support Card (Expansion Board)
- *
- * Copyright (C) 2015-2017 Socionext Inc.
- * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
- */
+// SPDX-License-Identifier: GPL-2.0+ OR MIT
+//
+// Device Tree Source for UniPhier Support Card (Expansion Board)
+//
+// Copyright (C) 2015-2017 Socionext Inc.
+// Author: Masahiro Yamada <yamada.masahiro@socionext.com>
&system_bus {
status = "okay";