}
-
+#ifdef CONFIG_PCI
/* PCI stuff */
static void pci_sc520_cdp_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
{
};
static int next_irq_index=0;
- char tmp_pin;
+ uchar tmp_pin;
int pin;
pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin);
{
pci_sc520_init(&sc520_cdp_hose);
}
-
+#endif
static void silence_uart(int port)
{
{
}
-int spi_eeprom_read(int x, int offset, char *buffer, int len)
+int spi_eeprom_read(int x, int offset, uchar *buffer, int len)
{
return 0;
}
-int spi_eeprom_write(int x, int offset, char *buffer, int len)
+int spi_eeprom_write(int x, int offset, uchar *buffer, int len)
{
return 0;
}
/* Three-wire (MicroWire) serial eeprom driver (for 93C46 and compatibles) */
#include <common.h>
-#include <ssi.h>
+#include <asm/ic/ssi.h>
/*
* Serial EEPROM opcodes, including start bit
}
-static inline void *memcpy(void *dst, const void *src, unsigned int len)
+void * memcpy(void * dest,const void *src,size_t count)
{
- void * ret = dst;
- while (len-- > 0) *((char *)dst)++ = *((char *)src)++;
- return ret;
+ char *tmp = (char *) dest, *s = (char *) src;
+
+ while (count--)
+ *tmp++ = *s++;
+
+ return dest;
}
+
/* The EEPROM commands include the alway-set leading bit. */
#define EE_WRITE_CMD (5)
#define EE_READ_CMD (6)
int size_test;
int i;
- printf("Resetting i82559 EEPROM @ 0x%08x ... ", ioaddr);
+ printf("Resetting i82559 EEPROM @ 0x%08lx ... ", ioaddr);
size_test = do_eeprom_cmd(ioaddr, (EE_READ_CMD << 8) << 16, 27);
eeprom_addr_size = (size_test & 0xffe0000) == 0xffe0000 ? 8 : 6;
int main (int argc, char *argv[])
{
unsigned char *eth_addr;
- char buf[6];
+ uchar buf[6];
int instance;
app_startup(argv);
#ifdef __GNUC__
-static __inline__ __const__ __u32 ___arch__swab32(__u32 x)
+static __inline__ __u32 ___arch__swab32(__u32 x)
{
#ifdef CONFIG_X86_BSWAP
__asm__("bswap %0" : "=r" (x) : "0" (x));
return x;
}
-static __inline__ __const__ __u16 ___arch__swab16(__u16 x)
+static __inline__ __u16 ___arch__swab16(__u16 x)
{
__asm__("xchgb %b0,%h0" /* swap bytes */ \
: "=q" (x) \
#define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */
#define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */
-extern gd_t *global_data;
+extern gd_t *gd;
-#define DECLARE_GLOBAL_DATA_PTR gd_t *gd = global_data
+#define DECLARE_GLOBAL_DATA_PTR
#endif /* __ASM_GBL_DATA_H */
--- /dev/null
+/*
+ * (C) Copyright 2008
+ * Graeme Russ <graeme.russ@gmail.com>.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _ASM_IC_SSI_H_
+#define _ASM_IC_SSI_H_ 1
+
+int ssi_set_interface(int, int, int, int);
+void ssi_chip_select(int);
+u8 ssi_txrx_byte(u8);
+void ssi_tx_byte(u8);
+u8 ssi_rx_byte(void);
+
+
+#endif
int pci_shadow_rom(pci_dev_t dev, unsigned char *dest);
void pci_remove_rom_window(struct pci_controller* hose, u32 addr);
u32 pci_get_rom_window(struct pci_controller* hose, int size);
-
#endif
* We don't do inline string functions, since the
* optimised inline asm versions are not small.
*/
+#undef __HAVE_ARCH_STRNCPY
+extern char *strncpy(char *__dest, __const__ char *__src, __kernel_size_t __n);
#undef __HAVE_ARCH_STRRCHR
extern char * strrchr(const char * s, int c);
#ifndef __CONFIG_H
#define __CONFIG_H
+#define GRUSS_TESTING
/*
* High Level Configuration Options
* (easy to change)
#include <config_cmd_default.h>
#define CONFIG_CMD_PCI
+#ifndef GRUSS_TESTING
#define CONFIG_CMD_SATA
+#else
+#undef CONFIG_CMD_SATA
+#endif
#define CONFIG_CMD_JFFS2
#define CONFIG_CMD_NET
#define CONFIG_CMD_EEPROM
/************************************************************
*SATA/Native Stuff
************************************************************/
+#ifndef GRUSS_TESTING
#define CFG_SATA_MAXBUS 2 /*Max Sata buses supported */
#define CFG_SATA_DEVS_PER_BUS 2 /*Max no. of devices per bus/port */
#define CFG_SATA_MAX_DEVICE (CFG_SATA_MAXBUS* CFG_SATA_DEVS_PER_BUS)
#define CONFIG_ATA_PIIX 1 /*Supports ata_piix driver */
+#else
+#undef CFG_SATA_MAXBUS
+#undef CFG_SATA_DEVS_PER_BUS
+#undef CFG_SATA_MAX_DEVICE
+#undef CONFIG_ATA_PIIX
+#endif
+
/************************************************************
* DISK Partition support
/************************************************************
* Video/Keyboard support
************************************************************/
+#ifndef GRUSS_TESTING
#define CONFIG_VIDEO /* To enable video controller support */
+#else
+#undef CONFIG_VIDEO
+#endif
#define CONFIG_I8042_KBD
#define CFG_ISA_IO 0
/*
* PCI stuff
*/
+#ifndef GRUSS_TESTING
#define CONFIG_PCI /* include pci support */
#define CONFIG_PCI_PNP /* pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW
#define CFG_SECOND_PCI_IRQ 9
#define CFG_THIRD_PCI_IRQ 11
#define CFG_FORTH_PCI_IRQ 15
+#else
+#undef CONFIG_PCI
+#undef CONFIG_PCI_PNP
+#undef CONFIG_PCI_SCAN_SHOW
+#endif
+
#endif /* __CONFIG_H */
{
static int done=0;
int vector;
+#ifdef CONFIG_PCI
struct pci_controller *pri_hose;
-
+#endif
if (done) {
return 0;
}
* (This, ofcause break on multi hose systems,
* but our PCI BIOS only support one hose anyway)
*/
+#ifdef CONFIG_PCI
pri_hose = pci_bus_to_hose(0);
if (NULL != pri_hose) {
/* fill in last pci bus number for use by the realmode
* PCI BIOS */
RELOC_16_BYTE(0xf000, pci_last_bus) = pri_hose->last_busno;
}
-
+#endif
return 0;
}
NULL,
};
-gd_t *global_data;
+gd_t *gd;
void start_i386boot (void)
{
show_boot_progress(0x21);
- gd = global_data = &gd_data;
+ gd = &gd_data;
/* compiler optimization barrier needed for GCC >= 3.4 */
__asm__ __volatile__("": : :"memory");
int i;
ulong reg;
char *s, *e;
- uchar tmp[64];
+ char tmp[64];
i = getenv_r ("ethaddr", tmp, sizeof (tmp));
s = (i > 0) ? tmp : NULL;
unsigned long do_go_exec (ulong (*entry)(int, char *[]), int argc, char *argv[])
{
/*
- * Nios function pointers are address >> 1
+ * TODO: Test this function - changed to fix compiler error.
+ * Original code was:
+ * return (entry >> 1) (argc, argv);
+ * with a comment about Nios function pointers are address >> 1
*/
- return (entry >> 1) (argc, argv);
+ return (entry) (argc, argv);
}
void *base_ptr;
ulong os_data, os_len;
image_header_t *hdr;
- int ret;
+
#if defined(CONFIG_FIT)
const void *data;
size_t len;
#endif
+#ifdef CONFIG_VIDEO
+
static int probe_isa_video(void)
{
u32 ptr;
return 1;
}
+#endif