Initial commit for PH1-Pro4 Ace and Sanji boards.
Note:
There are two variants for the Ace board in terms of the amount of
DDR memory; 1GB or 2GB.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
 dtb-$(CONFIG_ARCH_UNIPHIER) += \
        uniphier-ph1-ld4-ref.dtb \
        uniphier-ph1-ld6b-ref.dtb \
+       uniphier-ph1-pro4-ace.dtb \
        uniphier-ph1-pro4-ref.dtb \
+       uniphier-ph1-pro4-sanji.dtb \
        uniphier-ph1-pro5-4kbox.dtb \
        uniphier-ph1-sld3-ref.dtb \
        uniphier-ph1-sld8-ref.dtb \
 
--- /dev/null
+/*
+ * Device Tree Source for UniPhier PH1-Pro4 Ace Board
+ *
+ * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+        X11
+ */
+
+/dts-v1/;
+/include/ "uniphier-ph1-pro4.dtsi"
+
+/ {
+       model = "UniPhier PH1-Pro4 Ace Board";
+       compatible = "socionext,ph1-pro4-ace", "socionext,ph1-pro4";
+
+       memory {
+               device_type = "memory";
+               reg = <0x80000000 0x40000000>;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       aliases {
+               serial0 = &serial0;
+               serial1 = &serial1;
+               serial2 = &serial2;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c5 = &i2c5;
+               i2c6 = &i2c6;
+       };
+};
+
+&serial0 {
+       status = "okay";
+};
+
+&serial1 {
+       status = "okay";
+};
+
+&serial2 {
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+
+       eeprom {
+               compatible = "24c64", "i2c-eeprom";
+               reg = <0x54>;
+               u-boot,i2c-offset-len = <2>;
+       };
+};
+
+&i2c1 {
+       status = "okay";
+};
+
+&i2c2 {
+       status = "okay";
+};
+
+&i2c3 {
+       status = "okay";
+};
+
+&usb0 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};
+
+&usb2 {
+       status = "okay";
+};
+
+&usb3 {
+       status = "okay";
+};
+
+/* for U-Boot only */
+/ {
+       soc {
+               u-boot,dm-pre-reloc;
+       };
+};
+
+&serial0 {
+       u-boot,dm-pre-reloc;
+};
+
+&pinctrl {
+       u-boot,dm-pre-reloc;
+};
+
+&pinctrl_uart0 {
+       u-boot,dm-pre-reloc;
+};
 
--- /dev/null
+/*
+ * Device Tree Source for UniPhier PH1-Pro4 Sanji Board
+ *
+ * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+        X11
+ */
+
+/dts-v1/;
+/include/ "uniphier-ph1-pro4.dtsi"
+
+/ {
+       model = "UniPhier PH1-Pro4 Sanji Board";
+       compatible = "socionext,ph1-pro4-sanji", "socionext,ph1-pro4";
+
+       memory {
+               device_type = "memory";
+               reg = <0x80000000 0x80000000>;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       aliases {
+               serial0 = &serial0;
+               serial1 = &serial1;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c5 = &i2c5;
+               i2c6 = &i2c6;
+       };
+};
+
+&serial0 {
+       status = "okay";
+};
+
+&serial1 {
+       status = "okay";
+};
+
+&i2c0 {
+       status = "okay";
+
+       eeprom {
+               compatible = "24c64", "i2c-eeprom";
+               reg = <0x54>;
+               u-boot,i2c-offset-len = <2>;
+       };
+};
+
+&i2c1 {
+       status = "okay";
+};
+
+&i2c2 {
+       status = "okay";
+};
+
+&i2c3 {
+       status = "okay";
+};
+
+&usb0 {
+       status = "okay";
+};
+
+&usb1 {
+       status = "okay";
+};
+
+&usb2 {
+       status = "okay";
+};
+
+&usb3 {
+       status = "okay";
+};
+
+/* for U-Boot only */
+/ {
+       soc {
+               u-boot,dm-pre-reloc;
+       };
+};
+
+&serial0 {
+       u-boot,dm-pre-reloc;
+};
+
+&pinctrl {
+       u-boot,dm-pre-reloc;
+};
+
+&pinctrl_uart0 {
+       u-boot,dm-pre-reloc;
+};
 
        { "socionext,ph1-ld4-ref", "uniphier-ph1-ld4-ref.dtb", },
        { "socionext,ph1-ld6b-ref", "uniphier-ph1-ld6b-ref.dtb", },
        { "socionext,ph1-ld10-ref", "uniphier-ph1-ld10-ref.dtb", },
+       { "socionext,ph1-pro4-ace", "uniphier-ph1-pro4-ace.dtb", },
        { "socionext,ph1-pro4-ref", "uniphier-ph1-pro4-ref.dtb", },
+       { "socionext,ph1-pro4-sanji", "uniphier-ph1-pro4-sanji.dtb", },
        { "socionext,ph1-pro5-4kbox", "uniphier-ph1-pro5-4kbox.dtb", },
        { "socionext,ph1-sld3-ref", "uniphier-ph1-sld3-ref.dtb", },
        { "socionext,ph1-sld8-ref", "uniphier-ph1-sld8-ref.dtb", },
 
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
+/* 1GB RAM board */
 static const struct uniphier_board_data ph1_pro4_data = {
        .dram_ch0_base  = 0x80000000,
        .dram_ch0_size  = 0x20000000,
        .dram_ch1_width = 32,
        .dram_freq      = 1600,
 };
+
+/* 2GB RAM board */
+static const struct uniphier_board_data ph1_pro4_2g_data = {
+       .dram_ch0_base  = 0x80000000,
+       .dram_ch0_size  = 0x40000000,
+       .dram_ch0_width = 32,
+       .dram_ch1_base  = 0xc0000000,
+       .dram_ch1_size  = 0x40000000,
+       .dram_ch1_width = 32,
+       .dram_freq      = 1600,
+};
 #endif
 
 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)
        { "socionext,ph1-ld4", &ph1_ld4_data, },
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4)
+       { "socionext,ph1-pro4-ace", &ph1_pro4_2g_data, },
+       { "socionext,ph1-pro4-sanji", &ph1_pro4_2g_data, },
        { "socionext,ph1-pro4", &ph1_pro4_data, },
 #endif
 #if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8)