]> git.sur5r.net Git - u-boot/commitdiff
mtd: nand: omap: add CONFIG_NAND_OMAP_ECCSCHEME for selection of ecc-scheme
authorpekon gupta <pekon@ti.com>
Mon, 18 Nov 2013 13:33:01 +0000 (19:03 +0530)
committerScott Wood <scottwood@freescale.com>
Thu, 21 Nov 2013 19:33:41 +0000 (13:33 -0600)
This patch adds new CONFIG_NAND_OMAP_ECCSCHEME, replacing other distributed
CONFIG_xx used for selecting NAND ecc-schemes.
This patch aims at solving following issues.

1) Currently ecc-scheme is tied to SoC platform, which prevents user to select
   other ecc-schemes also supported in hardware. like;
 - most of OMAP3 SoC platforms use only 1-bit Hamming ecc-scheme, inspite
   the fact that they can use higher ecc-schemes like 8-bit ecc-schemes with
   software based error detection (OMAP_ECC_BCH4_CODE_HW_DETECTION_SW).
 - most of AM33xx SoC plaforms use 8-bit BCH ecc-scheme for now, but hardware
   supports BCH16 ecc-scheme also.

2) Different platforms use different CONFIG_xx to select ecc-schemes, which
   adds confusion for user while migrating platforms.
 - *CONFIG_NAND_OMAP_ELM* which enables ELM hardware engine, selects only
    8-bit BCH ecc-scheme with h/w based error-correction (OMAP_ECC_BCH8_CODE_HW)
    whereas ELM hardware engine supports other ecc-schemes also like; BCH4,
    and BCH16 (in future).
 - *CONFIG_NAND_OMAP_BCH8* selects 8-bit BCH ecc-scheme with s/w based error
    correction (OMAP_ECC_BCH8_CODE_HW_DETECTION_SW).
 - *CONFIG_SPL_NAND_SOFTECC* selects 1-bit Hamming ecc-scheme using s/w library

Thus adding new *CONFIG_NAND_OMAP_ECCSCHEME* de-couples ecc-scheme dependency
on SoC platform and NAND driver. And user can select ecc-scheme independently
foreach board.
However, selection some hardware based ecc-schemes (OMAP_ECC_BCHx_CODE_HW) still
depends on presence of ELM hardware engine on SoC. (Refer doc/README.nand)

Signed-off-by: Pekon Gupta <pekon@ti.com>
17 files changed:
doc/README.nand
doc/README.omap3
drivers/mtd/nand/omap_gpmc.c
include/configs/am335x_evm.h
include/configs/am335x_igep0033.h
include/configs/am3517_crane.h
include/configs/am3517_evm.h
include/configs/devkit8000.h
include/configs/mcx.h
include/configs/omap3_beagle.h
include/configs/omap3_evm.h
include/configs/omap3_evm_quick_nand.h
include/configs/omap3_igep00x0.h
include/configs/omap3_overo.h
include/configs/siemens-am33x-common.h
include/configs/tam3517-common.h
include/configs/tricorder.h

index 487548fcb8ede2e6bd255dfd2021eaf2f1baeaef..b91f1985d183d0c3681567293cae7d666139a441 100644 (file)
@@ -208,6 +208,29 @@ Platform specific options
        detection. However ECC calculation on such plaforms would still be
        done by GPMC controller.
 
+   CONFIG_NAND_OMAP_ECCSCHEME
+       On OMAP platforms, this CONFIG specifies NAND ECC scheme.
+       It can take following values:
+       OMAP_ECC_HAM1_CODE_SW
+               1-bit Hamming code using software lib.
+               (for legacy devices only)
+       OMAP_ECC_HAM1_CODE_HW
+               1-bit Hamming code using GPMC hardware.
+               (for legacy devices only)
+       OMAP_ECC_BCH4_CODE_HW_DETECTION_SW
+               4-bit BCH code (unsupported)
+       OMAP_ECC_BCH4_CODE_HW
+               4-bit BCH code (unsupported)
+       OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
+               8-bit BCH code with
+               - ecc calculation using GPMC hardware engine,
+               - error detection using software library.
+               - requires CONFIG_BCH to enable software BCH library
+               (For legacy device which do not have ELM h/w engine)
+       OMAP_ECC_BCH8_CODE_HW
+               8-bit BCH code with
+               - ecc calculation using GPMC hardware engine,
+               - error detection using ELM hardware engine.
 
 NOTE:
 =====
index 1fbe79db37dc9e1ba6f69ff225ef8b690dd7f5e6..a62c3574054d5a9cb36d918d3c35766967e81d81 100644 (file)
@@ -161,8 +161,7 @@ BCH8
 
 To enable hardware assisted BCH8 (8-bit BCH [Bose, Chaudhuri, Hocquenghem]) on
 OMAP3 devices we can use the BCH library in lib/bch.c. To do so add CONFIG_BCH
-to enable the library and CONFIG_NAND_OMAP_BCH8 to to enable hardware assisted
-syndrom generation to your board config.
+and set CONFIG_NAND_OMAP_ECCSCHEME=5 (refer README.nand) for selecting BCH8_SW.
 The NAND OOB layout is the same as in linux kernel, if the linux kernel BCH8
 implementation for OMAP3 works for you so the u-boot version should also.
 When you require the SPL to read with BCH8 there are two more configs to
index e6b289dec84dc4176764ec722c91c904367a159d..5e7e6b337544f3f7543baf7e8c1bcee9242a00e4 100644 (file)
@@ -1004,18 +1004,13 @@ int board_nand_init(struct nand_chip *nand)
        nand->ecc.layout = &omap_ecclayout;
 
        /* select ECC scheme */
-#if defined(CONFIG_NAND_OMAP_ELM)
-       err = omap_select_ecc_scheme(nand, OMAP_ECC_BCH8_CODE_HW,
+#if defined(CONFIG_NAND_OMAP_ECCSCHEME)
+       err = omap_select_ecc_scheme(nand, CONFIG_NAND_OMAP_ECCSCHEME,
                        CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE);
-#elif defined(CONFIG_NAND_OMAP_BCH8)
-       err = omap_select_ecc_scheme(nand, OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
-                       CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE);
-#elif !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_NAND_SOFTECC)
+#else
+       /* pagesize and oobsize are not required to configure sw ecc-scheme */
        err = omap_select_ecc_scheme(nand, OMAP_ECC_HAM1_CODE_SW,
                        0, 0);
-#else
-       err = omap_select_ecc_scheme(nand, OMAP_ECC_HAM1_CODE_HW,
-                       CONFIG_SYS_NAND_PAGE_SIZE, CONFIG_SYS_NAND_OOBSIZE);
 #endif
        if (err)
                return err;
index 73d8b4dfba4d6744040e4c9c7fae88a4cd3196ab..1d5916753db09248706e0001188311aae871edd5 100644 (file)
 
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       14
-
+#define CONFIG_SYS_NAND_ONFI_DETECTION
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_BCH8_CODE_HW
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 #endif
index 88ced7311f5fd9321fdd8cb6cd4596d20eac12d2..115d1b37c9e9439b17d949c7e1a4d6220a284401 100644 (file)
 
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       14
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_BCH8_CODE_HW
 
 #define        CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 
index c5e67bf87d43688dac719a7918ec112162dccd16..b24ef5414381d57198f63a0a820f5785bae51c79 100644 (file)
                                                10, 11, 12, 13}
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       3
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 
index 5ff65c6d58c1519d52d83eaf19bd2037b1e459e5..f13fd7001cc5b65ffea0a22c285bade7a4a35289 100644 (file)
                                                10, 11, 12, 13}
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       3
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 
index 8343891cb8d8d47d31fb1579a3e1b37b8233bc38..13315dc4b6b70151e9f242992288c3e2cf1ad906 100644 (file)
 
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       3
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
 
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 
index 4619dfb3e4759f613b48b06ef67a8e25717e74b3..56102f5712fc54a6de8215d620d570301a9da9b5 100644 (file)
 #define CONFIG_SPL_FRAMEWORK
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_NAND_SIMPLE
-#define CONFIG_SPL_NAND_SOFTECC
 
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
 #define CONFIG_SPL_LIBDISK_SUPPORT
                                         56, 57, 58, 59, 60, 61, 62, 63}
 #define CONFIG_SYS_NAND_ECCSIZE                256
 #define CONFIG_SYS_NAND_ECCBYTES       3
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_SW
 
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 
index 47d99020887b975c3a6f797d923bf347212356fa..8b686356685c81e6403a9f9a04868a48332c9861 100644 (file)
                                                10, 11, 12, 13}
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       3
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 
index 3ace8bb6e5c8c6164155888406f530e7b8a40379..b7638fb8a68395e257935002bbdc19d98045926a 100644 (file)
                                                10, 11, 12, 13}
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       3
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 
index 9ecd70d55b05aed97aa04c064fadb4c2467f358b..4427e88b7e4b32b135968a98799ad8ef7a888172 100644 (file)
@@ -86,6 +86,7 @@
                                                10, 11, 12, 13}
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       3
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 
index ac36ac69504b27fa5cedf04c96b2a84ebf4b88b2..cdaa9ba9a442ce63f6944867f1f2893a6d8a95b8 100644 (file)
                                                10, 11, 12, 13}
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       3
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 #endif
index 46416946c7965a418283bee7a71cf52cf2f6206b..00d7c6cebca4976d86563b34de48ae0602eadaf1 100644 (file)
                                                10, 11, 12, 13}
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       3
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_HW
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    0x80000
 
index f3b41975cf5e08389490a669455753786a740751..e3944782f68210c2c93218a796bec53c0f783150 100644 (file)
 
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       14
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_BCH8_CODE_HW
 
 #define CONFIG_SYS_NAND_ECCSTEPS       4
 #define        CONFIG_SYS_NAND_ECCTOTAL        (CONFIG_SYS_NAND_ECCBYTES * \
index 683bc54a2c1c2eb929ea623a8739e2a922b390cb..48698b57da40acfab64e6705165906735cf920bb 100644 (file)
 #define CONFIG_SPL_BOARD_INIT
 #define CONFIG_SPL_CONSOLE
 #define CONFIG_SPL_NAND_SIMPLE
-#define CONFIG_SPL_NAND_SOFTECC
 #define CONFIG_SPL_NAND_WORKSPACE      0x8f07f000 /* below BSS */
 
 #define CONFIG_SPL_LIBCOMMON_SUPPORT
                                         56, 57, 58, 59, 60, 61, 62, 63}
 #define CONFIG_SYS_NAND_ECCSIZE                256
 #define CONFIG_SYS_NAND_ECCBYTES       3
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_HAM1_CODE_SW
 
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE
 
index 590eab7e483b73c26d5c0c07102fa88c5b6025ef..3ca1fd0e657a7177a419ca3eca16dc7c72bb61a0 100644 (file)
 
 #define CONFIG_SYS_MAX_NAND_DEVICE     1               /* Max number of NAND */
                                                        /* devices */
-#define CONFIG_NAND_OMAP_BCH8
 #define CONFIG_BCH
 #define CONFIG_SYS_NAND_MAX_OOBFREE    2
 #define CONFIG_SYS_NAND_MAX_ECCPOS     56
 
 #define CONFIG_SYS_NAND_ECCSIZE                512
 #define CONFIG_SYS_NAND_ECCBYTES       13
+#define CONFIG_NAND_OMAP_ECCSCHEME     OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
 
 #define CONFIG_SYS_NAND_U_BOOT_START   CONFIG_SYS_TEXT_BASE