kirkwood_spi: correct access to irq_mask register

Problem appears to have been present since day one but masked because alignment
aborts were not enabled. ca4b55800ed7 "arm, arm926ejs: always do cpu critical
inits" turned on alignment aborts and uncovered this latent problem.

Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-By: Jason Cooper <u-boot@lakedaemon.net>
Tested-By: Holger Brunck <holger.brunck@keymile.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>

diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c
index dfe542db64ef8371532af52029e4770dd9d04172..db8ba8bdacbe746129237a74f0488554530e019a 100644 (file)
--- a/drivers/spi/kirkwood_spi.c
+++ b/drivers/spi/kirkwood_spi.c
@@ -66,7 +66,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
        debug("data = 0x%08x \n", data);
 
        writel(KWSPI_SMEMRDIRQ, &spireg->irq_cause);
-       writel(KWSPI_IRQMASK, spireg->irq_mask);
+       writel(KWSPI_IRQMASK, &spireg->irq_mask);
 
        /* program mpp registers to select  SPI_CSn */
        if (cs) {