Changes for U-Boot 1.0.2:
======================================================================
+* Fix problem with side effects in macros in include/usb.h
+
+* Patch by David Benson, 13 Nov 2003:
+ bug 841358 - fix TFTP download size limit
+
+* Fixing bug 850768:
+ improper flush_cache() in load_serial()
+
+* Fixing bug 834943:
+ MPC8540 - missing volatile declarations
+
+* Patch by Stephen Williams, 09 Feb 2004:
+ Add support for Xilinx SystemACE chip:
+ - New files common/cmd_ace.c and include/systemace.h
+ - Hook systemace support into cmd_fat and the partition manager
+
+* Patch by Travis Sawyer, 09 Feb 2004:
+ Add bi_opbfreq & bi_iic_fast to 440GX bd_info as needed for Linux
+
* Patch by Travis Sawyer, 09 Feb 2004:
o 440GX:
- Fix PCI Indirect access for type 1 config cycles with ppc440.
allows to read/write in Dataflash via the standard
commands cp, md...
+- SystemACE Support:
+ CONFIG_SYSTEMACE
+
+ Adding this option adds support for Xilinx SystemACE
+ chips attached via some sort of local bus. The address
+ of the chip must alsh be defined in the
+ CFG_SYSTEMACE_BASE macro. For example:
+
+ #define CONFIG_SYSTEMACE
+ #define CFG_SYSTEMACE_BASE 0xf0000000
+
+ When SystemACE support is added, the "ace" device type
+ becomes available to the fat commands, i.e. fatls.
+
- Show boot progress:
CONFIG_SHOW_BOOT_PROGRESS
0x05,0x02,0x02,0x03,0x02,0x02,0x03,0x02,0x02,0x01,0x07,0x03,0x02,0x02,0x02,0x04,
0x02,0x01,0x04,0x02,0x01,0x02,0x01,0x02,0x01,0x01,0xe5,0x05,0x04,0x03,0x07,0xe5,
0xe5,0x03,0x04,0x04,0x0b,0x02,0xe5,0x01,0xe5,0x01,0xe5,0xff,0xff,0xff,0xff,0xff,
- 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
\ No newline at end of file
+ 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
tras_clocks = info[0].tras_clocks;
if (!info[0].registered)
registered = 0;
- if (info[0].ecc != 2indent: Standard input:491: Warning:old style assignment ambiguity in "=*". Assuming "= *"
-
-indent: Standard input:492: Warning:old style assignment ambiguity in "=*". Assuming "= *"
-
-)
+ if (info[0].ecc != 2)
ecc = 0;
}
AOBJS =
COBJS = main.o ACEX1K.o altera.o bedbug.o \
- cmd_autoscript.o \
+ cmd_ace.o cmd_autoscript.o \
cmd_bdinfo.o cmd_bedbug.o cmd_bmp.o cmd_boot.o cmd_bootm.o \
cmd_cache.o cmd_console.o \
cmd_date.o cmd_dcr.o cmd_diag.o cmd_doc.o cmd_dtt.o \
--- /dev/null
+/*
+ * Copyright (c) 2004 Picture Elements, Inc.
+ * Stephen Williams (XXXXXXXXXXXXXXXX)
+ *
+ * This source code is free software; you can redistribute it
+ * and/or modify it in source code form under the terms of the GNU
+ * General Public License as published by the Free Software
+ * Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ident "$Id:$"
+
+/*
+ * The Xilinx SystemACE chip support is activated by defining
+ * CONFIG_SYSTEMACE to turn on support, and CFG_SYSTEMACE_BASE
+ * to set the base address of the device. This code currently
+ * assumes that the chip is connected via a byte-wide bus.
+ *
+ * The CONFIG_SYSTEMACE also adds to fat support the device class
+ * "ace" that allows the user to execute "fatls ace 0" and the
+ * like. This works by making the systemace_get_dev function
+ * available to cmd_fat.c:get_dev and filling in a block device
+ * description that has all the bits needed for FAT support to
+ * read sectors.
+ */
+
+# include <common.h>
+# include <command.h>
+# include <systemace.h>
+# include <part.h>
+# include <asm/io.h>
+
+#ifdef CONFIG_SYSTEMACE
+
+/*
+ * The ace_readw and writew functions read/write 16bit words, but the
+ * offset value is the BYTE offset as most used in the Xilinx
+ * datasheet for the SystemACE chip. The CFG_SYSTEMACE_BASE is defined
+ * to be the base address for the chip, usually in the local
+ * peripheral bus.
+ */
+static unsigned ace_readw(unsigned offset)
+{
+ return readw(CFG_SYSTEMACE_BASE+offset);
+}
+
+static unsigned ace_writew(unsigned val, unsigned offset)
+{
+ writew(val, CFG_SYSTEMACE_BASE+offset);
+}
+
+/* */
+
+static unsigned long systemace_read(int dev,
+ unsigned long start,
+ unsigned long blkcnt,
+ unsigned long *buffer);
+
+static block_dev_desc_t systemace_dev = {0};
+
+static int get_cf_lock(void)
+{
+ int retry = 10;
+
+ /* CONTROLREG = LOCKREG */
+ ace_writew(0x0002, 0x18);
+
+ /* Wait for MPULOCK in STATUSREG[15:0] */
+ while (! (ace_readw(0x04) & 0x0002)) {
+
+ if (retry < 0)
+ return -1;
+
+ udelay(100000);
+ retry -= 1;
+ }
+
+ return 0;
+}
+
+static void release_cf_lock(void)
+{
+ /* CONTROLREG = none */
+ ace_writew(0x0000, 0x18);
+}
+
+block_dev_desc_t * systemace_get_dev(int dev)
+{
+ /* The first time through this, the systemace_dev object is
+ not yet initialized. In that case, fill it in. */
+ if (systemace_dev.blksz == 0) {
+ systemace_dev.if_type = IF_TYPE_UNKNOWN;
+ systemace_dev.part_type = PART_TYPE_UNKNOWN;
+ systemace_dev.type = DEV_TYPE_HARDDISK;
+ systemace_dev.blksz = 512;
+ systemace_dev.removable = 1;
+ systemace_dev.block_read = systemace_read;
+ }
+
+ return &systemace_dev;
+}
+
+/*
+ * This function is called (by dereferencing the block_read pointer in
+ * the dev_desc) to read blocks of data. The return value is the
+ * number of blocks read. A zero return indicates an error.
+ */
+static unsigned long systemace_read(int dev,
+ unsigned long start,
+ unsigned long blkcnt,
+ unsigned long *buffer)
+{
+ unsigned val;
+ int retry;
+ unsigned char*dp = (unsigned char*)buffer;
+
+ if (get_cf_lock() < 0) {
+ unsigned status = ace_readw(0x04);
+
+ /* If CFDETECT is false, card is missing. */
+ if (! (status&0x0010)) {
+ printf("** CompactFlash card not present. **\n");
+ return 0;
+ }
+
+ printf("**** ACE locked away from me (STATUSREG=%04x)\n", status);
+ return 0;
+ }
+
+ retry = 2000;
+ for (;;) {
+ unsigned val = ace_readw(0x04);
+
+ /* If CFDETECT is false, card is missing. */
+ if (! (val & 0x0010)) {
+ printf("**** ACE CompactFlash not found.\n");
+ release_cf_lock();
+ return 0;
+ }
+
+ /* If RDYFORCMD, then we are ready to go. */
+ if (val & 0x0100)
+ break;
+
+ if (retry < 0) {
+ printf("**** SystemACE not ready.\n");
+ release_cf_lock();
+ return 0;
+ }
+
+ udelay(1000);
+ retry -= 1;
+ }
+
+ /* Write LBA block address */
+ ace_writew(start & 0xffff, 0x10);
+ start >>= 16;
+ ace_writew(start & 0xff, 0x12);
+
+ /* Write sector count | ReadMemCardData. */
+ ace_writew(blkcnt | 0x0300, 0x14);
+
+ /* CONTROLREG = CFGRESET|LOCKREQ */
+ ace_writew(0x0082, 0x18);
+
+ retry = blkcnt * 16;
+ while (retry > 0) {
+ int idx;
+
+ /* Wait for buffer to become ready. */
+ while (! (ace_readw(0x04) & 0x0020)) {
+ udelay(1000);
+ }
+
+ /* Read 16 words of 2bytes from the sector buffer. */
+ for (idx = 0 ; idx < 16 ; idx += 1) {
+ unsigned short val = ace_readw(0x40);
+ *dp++ = val & 0xff;
+ *dp++ = (val>>8) & 0xff;
+ }
+
+ retry -= 1;
+ }
+
+ release_cf_lock();
+
+ return blkcnt;
+}
+
+
+#endif
+
+/*
+ * $Log: $
+ */
+
extern block_dev_desc_t * mmc_get_dev(int dev);
return(mmc_get_dev(dev));
}
+#endif
+#if defined(CONFIG_SYSTEMACE)
+ if (strcmp(ifname,"ace")==0) {
+ extern block_dev_desc_t * systemace_get_dev(int dev);
+ return(systemace_get_dev(dev));
+ }
#endif
return NULL;
}
"## Total Size = 0x%08lX = %ld Bytes\n",
start_addr, end_addr, size, size
);
- flush_cache (addr, size);
+ flush_cache (start_addr, size);
sprintf(buf, "%lX", size);
setenv("filesize", buf);
return (addr);
static int tsec_recv(struct eth_device* dev);
static int tsec_init(struct eth_device* dev, bd_t * bd);
static void tsec_halt(struct eth_device* dev);
-static void init_registers(tsec_t *regs);
-static void startup_tsec(tsec_t *regs);
-static void init_phy(tsec_t *regs);
+static void init_registers(volatile tsec_t *regs);
+static void startup_tsec(volatile tsec_t *regs);
+static void init_phy(volatile tsec_t *regs);
/* Initialize device structure. returns 0 on failure, 1 on
* success */
* and brings the interface up */
int tsec_init(struct eth_device* dev, bd_t * bd)
{
- tsec_t *regs;
+ volatile tsec_t *regs;
uint tempval;
char tmpbuf[MAC_ADDR_LEN];
int i;
- regs = (tsec_t *)(TSEC_BASE_ADDR);
+ regs = (volatile tsec_t *)(TSEC_BASE_ADDR);
/* Make sure the controller is stopped */
tsec_halt(dev);
/* and then passes those bits on to the variable specified in */
/* value */
/* Before it does the read, it needs to clear the command field */
-uint read_phy_reg(tsec_t *regbase, uint phyid, uint offset)
+uint read_phy_reg(volatile tsec_t *regbase, uint phyid, uint offset)
{
uint value;
}
/* Setup the PHY */
-static void init_phy(tsec_t *regs)
+static void init_phy(volatile tsec_t *regs)
{
uint testval;
unsigned int timeout = TSEC_TIMEOUT;
}
-static void init_registers(tsec_t *regs)
+static void init_registers(volatile tsec_t *regs)
{
/* Clear IEVENT */
regs->ievent = IEVENT_INIT_CLEAR;
}
-static void startup_tsec(tsec_t *regs)
+static void startup_tsec(volatile tsec_t *regs)
{
int i;
{
int i;
int result = 0;
- tsec_t * regs = (tsec_t *)(TSEC_BASE_ADDR);
+ volatile tsec_t * regs = (volatile tsec_t *)(TSEC_BASE_ADDR);
/* Find an empty buffer descriptor */
for(i=0; rtx.txbd[txIdx].status & TXBD_READY; i++) {
static int tsec_recv(struct eth_device* dev)
{
int length;
- tsec_t *regs = (tsec_t *)(TSEC_BASE_ADDR);
+ volatile tsec_t *regs = (volatile tsec_t *)(TSEC_BASE_ADDR);
while(!(rtx.rxbd[rxIdx].status & RXBD_EMPTY)) {
static void tsec_halt(struct eth_device* dev)
{
- tsec_t *regs = (tsec_t *)(TSEC_BASE_ADDR);
+ volatile tsec_t *regs = (volatile tsec_t *)(TSEC_BASE_ADDR);
regs->dmactrl &= ~(DMACTRL_GRS | DMACTRL_GTS);
regs->dmactrl |= (DMACTRL_GRS | DMACTRL_GTS);
/* Allocate device structure */
dev = (struct eth_device *) malloc (sizeof (*dev));
if (dev == NULL) {
- printf (__FUNCTION__
- ": Cannot allocate eth_device %d\n", eth_num);
+ printf ("ppc_440x_eth_initialize: "
+ "Cannot allocate eth_device %d\n", eth_num);
return (-1);
}
/* Allocate our private use data */
hw = (EMAC_440GX_HW_PST) malloc (sizeof (*hw));
if (hw == NULL) {
- printf (__FUNCTION__
- ": Cannot allocate private hw data for eth_device %d",
+ printf ("ppc_440x_eth_initialize: "
+ "Cannot allocate private hw data for eth_device %d",
eth_num);
free (dev);
return (-1);
#if ((CONFIG_COMMANDS & CFG_CMD_IDE) || \
(CONFIG_COMMANDS & CFG_CMD_SCSI) || \
(CONFIG_COMMANDS & CFG_CMD_USB) || \
- (CONFIG_MMC) )
+ (CONFIG_MMC) || (CONFIG_SYSTEMACE) )
/* ------------------------------------------------------------------------- */
/*
#if ((CONFIG_COMMANDS & CFG_CMD_IDE) || \
(CONFIG_COMMANDS & CFG_CMD_SCSI) || \
- (CONFIG_COMMANDS & CFG_CMD_USB) )
+ (CONFIG_COMMANDS & CFG_CMD_USB) || \
+ defined(CONFIG_SYSTEMACE) )
#if defined(CONFIG_MAC_PARTITION) || \
defined(CONFIG_DOS_PARTITION) || \
#if ((CONFIG_COMMANDS & CFG_CMD_IDE) || \
(CONFIG_COMMANDS & CFG_CMD_SCSI) || \
- (CONFIG_COMMANDS & CFG_CMD_USB) ) && defined(CONFIG_DOS_PARTITION)
+ (CONFIG_COMMANDS & CFG_CMD_USB) || \
+ (CONFIG_SYSTEMACE)) && defined(CONFIG_DOS_PARTITION)
/* Convert char[4] in little endian format to the host format integer
*/
#if defined(CONFIG_440_GX)
unsigned char bi_enet3addr[6];
#endif
-#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
+#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined (CONFIG_440_GX)
unsigned int bi_opbfreq; /* OPB clock in Hz */
int bi_iic_fast[2]; /* Use fast i2c mode */
#endif
0x0343, 0x0454, 0x0565, 0x0565, 0x0676, 0x0787, 0x0898, 0x0999,
0x0AAA, 0x0ABA, 0x0BCB, 0x0CCC, 0x0DDD, 0x0EEE, 0x0FFF, 0x0FB3,
0x0FB4, 0x0FC4, 0x0FC5, 0x0FC6, 0x0FD7, 0x0FD8, 0x0FD9, 0x0FDA,
- 0x0FEA, 0x0FEB, 0x0FEC, 0x0FFD, 0x0FFE, 0x0FFF, 0x0FFF,
+ 0x0FEA, 0x0FEB, 0x0FEC, 0x0FFD, 0x0FFE, 0x0FFF, 0x0FFF,
};
unsigned char bmp_logo_bitmap[] = {
--- /dev/null
+#ifndef __SYSTEMACE_H
+#define __SYSTEMACE_H
+/*
+ * Copyright (c) 2004 Picture Elements, Inc.
+ * Stephen Williams (steve@picturel.com)
+ *
+ * This source code is free software; you can redistribute it
+ * and/or modify it in source code form under the terms of the GNU
+ * General Public License as published by the Free Software
+ * Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ident "$Id:$"
+
+#ifdef CONFIG_SYSTEMACE
+
+# include <part.h>
+
+block_dev_desc_t * systemace_get_dev(int dev);
+
+#endif /* CONFIG_SYSTEMACE */
+#endif /* __SYSTEMACE_H */
#define swap_32(x) ((unsigned long)(x))
#else
#define swap_16(x) \
- ((unsigned short)( \
- (((unsigned short)(x) & (unsigned short)0x00ffU) << 8) | \
- (((unsigned short)(x) & (unsigned short)0xff00U) >> 8) ))
+ ({ unsigned short x_ = (unsigned short)x; \
+ (unsigned short)( \
+ ((x_ & 0x00FFU) << 8) | ((x_ & 0xFF00U) >> 8) ); \
+ })
#define swap_32(x) \
- ((unsigned long)( \
- (((unsigned long)(x) & (unsigned long)0x000000ffUL) << 24) | \
- (((unsigned long)(x) & (unsigned long)0x0000ff00UL) << 8) | \
- (((unsigned long)(x) & (unsigned long)0x00ff0000UL) >> 8) | \
- (((unsigned long)(x) & (unsigned long)0xff000000UL) >> 24) ))
+ ({ unsigned long x_ = (unsigned long)x; \
+ (unsigned long)( \
+ ((x_ & 0x000000FFUL) << 24) | \
+ ((x_ & 0x0000FF00UL) << 8) | \
+ ((x_ & 0x00FF0000UL) >> 8) | \
+ ((x_ & 0xFF000000UL) >> 24) ); \
+ })
#endif /* LITTLEENDIAN */
/*
static int TftpServerPort; /* The UDP port at their end */
static int TftpOurPort; /* The UDP port at our end */
static int TftpTimeoutCount;
-static unsigned TftpBlock;
-static unsigned TftpLastBlock;
+static ulong TftpBlock; /* packet sequence number */
+static ulong TftpLastBlock; /* last packet sequence number received */
+static ulong TftpBlockWrap; /* count of sequence number wraparounds */
+static ulong TftpBlockWrapOffset; /* memory offset due to wrapping */
static int TftpState;
+
#define STATE_RRQ 1
#define STATE_DATA 2
#define STATE_TOO_LARGE 3
#define STATE_BAD_MAGIC 4
#define STATE_OACK 5
+#define TFTP_BLOCK_SIZE 512 /* default TFTP block size */
+#define TFTP_SEQUENCE_SIZE ((ulong)(1<<16)) /* sequence number is 16 bit */
+
#define DEFAULT_NAME_LEN (8 + 4 + 1)
static char default_filename[DEFAULT_NAME_LEN];
static char *tftp_filename;
static __inline__ void
store_block (unsigned block, uchar * src, unsigned len)
{
- ulong offset = block * 512, newsize = offset + len;
+ ulong offset = block * TFTP_BLOCK_SIZE + TftpBlockWrapOffset;
+ ulong newsize = offset + len;
#ifdef CFG_DIRECT_FLASH_TFTP
int i, rc = 0;
return;
len -= 2;
TftpBlock = ntohs(*(ushort *)pkt);
- if (((TftpBlock - 1) % 10) == 0) {
- putc ('#');
- } else if ((TftpBlock % (10 * HASHES_PER_LINE)) == 0) {
- puts ("\n\t ");
+
+ /*
+ * RFC1350 specifies that the first data packet will
+ * have sequence number 1. If we receive a sequence
+ * number of 0 this means that there was a wrap
+ * around of the (16 bit) counter.
+ */
+ if (TftpBlock == 0) {
+ TftpBlockWrap++;
+ TftpBlockWrapOffset += TFTP_BLOCK_SIZE * TFTP_SEQUENCE_SIZE;
+ printf ("\n\t %lu MB reveived\n\t ", TftpBlockWrapOffset>>20);
+ } else {
+ if (((TftpBlock - 1) % 10) == 0) {
+ putc ('#');
+ } else if ((TftpBlock % (10 * HASHES_PER_LINE)) == 0) {
+ puts ("\n\t ");
+ }
}
#ifdef ET_DEBUG
#endif
if (TftpState == STATE_RRQ || TftpState == STATE_OACK) {
+ /* first block received */
TftpState = STATE_DATA;
TftpServerPort = src;
TftpLastBlock = 0;
+ TftpBlockWrap = 0;
+ TftpBlockWrapOffset = 0;
if (TftpBlock != 1) { /* Assertion */
printf ("\nTFTP error: "
- "First block is not block 1 (%d)\n"
+ "First block is not block 1 (%ld)\n"
"Starting again\n\n",
TftpBlock);
NetStartAgain ();
*/
TftpSend ();
- if (len < 512) {
+ if (len < TFTP_BLOCK_SIZE) {
/*
* We received the whole thing. Try to
* run it.
/* ************************************************************************* */
#ifdef CONFIG_SXNI855T /* !!! SHOULD BE CHANGED TO NEW CODE !!! */
-static unsigned char rtc_read (unsigned char reg);
-static void rtc_write (unsigned char reg, unsigned char val);
static void soft_spi_send (unsigned char n);
static unsigned char soft_spi_read (void);
static void init_spi (void);
#else /* not CONFIG_SXNI855T */
/* ************************************************************************* */
+static unsigned char rtc_read (unsigned char reg);
+static void rtc_write (unsigned char reg, unsigned char val);
+
/* read clock time from DS1306 and return it in *tmp */
void rtc_get (struct rtc_time *tmp)
{
projects / u-boot / commitdiff