mpc85xx: Configure QE USB for MPC8569E-MDS boards

Setup QE pin multiplexing for USB function, configure needed BCSRs
and add some fdt fixups.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/board/freescale/mpc8569mds/bcsr.h b/board/freescale/mpc8569mds/bcsr.h
index 179a54c2572342bed57ee7fcaf5c9c565d2f707a..091b69c8d03280f39ae57fd5f09636750bc939cb 100644 (file)
--- a/board/freescale/mpc8569mds/bcsr.h
+++ b/board/freescale/mpc8569mds/bcsr.h
@@ -72,6 +72,10 @@
 
 #define BCSR16_UPC1_DEV2       0x02
 
+#define BCSR17_nUSBEN          0x80
+#define BCSR17_nUSBLOWSPD      0x40
+#define BCSR17_USBVCC          0x20
+#define BCSR17_USBMODE         0x10
 #define BCSR17_FLASH_nWP       0x01
 
 /*BCSR Utils functions*/

diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
index ef99a751fd6050d03b1523432d245c6579738ef4..cdd7813011a5b1ea2e9865f79f8c1a3d8b03df8c 100644 (file)
--- a/board/freescale/mpc8569mds/mpc8569mds.c
+++ b/board/freescale/mpc8569mds/mpc8569mds.c
@@ -160,6 +160,15 @@ const qe_iop_conf_t qe_iop_conf_tab[] = {
        {0, 25, 1, 0, 1}, /* QEUART_RTS                */
        {1, 23, 2, 0, 1}, /* QEUART_CTS                */
 
+       /* QE USB                                      */
+       {5,  3, 1, 0, 1}, /* USB_OE                    */
+       {5,  4, 1, 0, 2}, /* USB_TP                    */
+       {5,  5, 1, 0, 2}, /* USB_TN                    */
+       {5,  6, 2, 0, 2}, /* USB_RP                    */
+       {5,  7, 2, 0, 1}, /* USB_RX                    */
+       {5,  8, 2, 0, 1}, /* USB_RN                    */
+       {2,  4, 2, 0, 2}, /* CLK5                      */
+
        /* SPI Flash, M25P40                           */
        {4, 27, 3, 0, 1}, /* SPI_MOSI                  */
        {4, 28, 3, 0, 1}, /* SPI_MISO                  */
@@ -479,6 +488,28 @@ static void fdt_board_fixup_esdhc(void *blob, bd_t *bd)
 static inline void fdt_board_fixup_esdhc(void *blob, bd_t *bd) {}
 #endif
 
+static void fdt_board_fixup_qe_usb(void *blob, bd_t *bd)
+{
+       u8 *bcsr = (u8 *)CONFIG_SYS_BCSR_BASE;
+
+       if (hwconfig_subarg_cmp("qe_usb", "speed", "low"))
+               clrbits_8(&bcsr[17], BCSR17_nUSBLOWSPD);
+       else
+               setbits_8(&bcsr[17], BCSR17_nUSBLOWSPD);
+
+       if (hwconfig_subarg_cmp("qe_usb", "mode", "peripheral")) {
+               clrbits_8(&bcsr[17], BCSR17_USBVCC);
+               clrbits_8(&bcsr[17], BCSR17_USBMODE);
+               do_fixup_by_compat(blob, "fsl,mpc8569-qe-usb", "mode",
+                                  "peripheral", sizeof("peripheral"), 1);
+       } else {
+               setbits_8(&bcsr[17], BCSR17_USBVCC);
+               setbits_8(&bcsr[17], BCSR17_USBMODE);
+       }
+
+       clrbits_8(&bcsr[17], BCSR17_nUSBEN);
+}
+
 #ifdef CONFIG_PCIE1
 static struct pci_controller pcie1_hose;
 #endif  /* CONFIG_PCIE1 */
@@ -622,5 +653,6 @@ void ft_board_setup(void *blob, bd_t *bd)
 #endif
        fdt_board_fixup_esdhc(blob, bd);
        fdt_board_fixup_qe_uart(blob, bd);
+       fdt_board_fixup_qe_usb(blob, bd);
 }
 #endif

diff --git a/drivers/qe/fdt.c b/drivers/qe/fdt.c
index 53074889c1a5cf2e1097077fa7f9f2adabe66a4c..d7c7d13cab535ccfbf6785352c2312ad00c9fcea 100644 (file)
--- a/drivers/qe/fdt.c
+++ b/drivers/qe/fdt.c
@@ -85,6 +85,8 @@ void ft_qe_setup(void *blob)
                "bus-frequency", gd->qe_clk, 1);
        do_fixup_by_compat_u32(blob, "fsl,qe",
                "brg-frequency", gd->brg_clk, 1);
+       do_fixup_by_compat_u32(blob, "fsl,qe-gtm",
+               "clock-frequency", gd->qe_clk / 2, 1);
        fdt_fixup_qe_firmware(blob);
 #endif
 }