* SPDX-License-Identifier: GPL-2.0+
*/
+#include <command.h>
#include <common.h>
#include <asm/io.h>
#include <asm/arch/at91sam9260_matrix.h>
&mat->scfg[3]);
}
+#if defined(CONFIG_BOARD_AXM)
+static int at91_is_recovery(void)
+{
+ if ((at91_get_gpio_value(AT91_PIN_PA26) == 0) &&
+ (at91_get_gpio_value(AT91_PIN_PA27) == 0))
+ return 1;
+
+ return 0;
+}
+#elif defined(CONFIG_BOARD_TAURUS)
+static int at91_is_recovery(void)
+{
+ if (at91_get_gpio_value(AT91_PIN_PA31) == 0)
+ return 1;
+
+ return 0;
+}
+#endif
+
void at91_spl_board_init(void)
{
taurus_nand_hw_init();
at91_spi0_hw_init(TAURUS_SPI_MASK);
+#if defined(CONFIG_BOARD_AXM)
+ /* Configure LED PINs */
+ at91_set_gpio_output(AT91_PIN_PA6, 0);
+ at91_set_gpio_output(AT91_PIN_PA8, 0);
+ at91_set_gpio_output(AT91_PIN_PA9, 0);
+ at91_set_gpio_output(AT91_PIN_PA10, 0);
+ at91_set_gpio_output(AT91_PIN_PA11, 0);
+ at91_set_gpio_output(AT91_PIN_PA12, 0);
+
/* Configure recovery button PINs */
+ at91_set_gpio_input(AT91_PIN_PA26, 1);
+ at91_set_gpio_input(AT91_PIN_PA27, 1);
+#elif defined(CONFIG_BOARD_TAURUS)
at91_set_gpio_input(AT91_PIN_PA31, 1);
+#endif
- /* check if button is pressed */
- if (at91_get_gpio_value(AT91_PIN_PA31) == 0) {
+ /* check for recovery mode */
+ if (at91_is_recovery() == 1) {
struct spi_flash *flash;
debug("Recovery button pressed\n");
}
}
-void mem_init(void)
+#define SDRAM_BASE_CONF (AT91_SDRAMC_NR_13 | AT91_SDRAMC_CAS_3 \
+ |AT91_SDRAMC_NB_4 | AT91_SDRAMC_DBW_32 \
+ | AT91_SDRAMC_TWR_VAL(3) | AT91_SDRAMC_TRC_VAL(9) \
+ | AT91_SDRAMC_TRP_VAL(3) | AT91_SDRAMC_TRCD_VAL(3) \
+ | AT91_SDRAMC_TRAS_VAL(6) | AT91_SDRAMC_TXSR_VAL(10))
+
+void sdramc_configure(unsigned int mask)
{
struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX;
struct sdramc_reg setting;
at91_sdram_hw_init();
- setting.cr = (AT91_SDRAMC_NC_9 |
- AT91_SDRAMC_NR_13 |
- AT91_SDRAMC_CAS_3 |
- AT91_SDRAMC_NB_4 |
- AT91_SDRAMC_DBW_32 |
- AT91_SDRAMC_TWR_VAL(3) |
- AT91_SDRAMC_TRC_VAL(9) |
- AT91_SDRAMC_TRP_VAL(3) |
- AT91_SDRAMC_TRCD_VAL(3) |
- AT91_SDRAMC_TRAS_VAL(6) |
- AT91_SDRAMC_TXSR_VAL(10));
+ setting.cr = SDRAM_BASE_CONF | mask;
setting.mdr = AT91_SDRAMC_MD_SDRAM;
setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000;
-
writel(readl(&ma->ebicsa) | AT91_MATRIX_CS1A_SDRAMC |
AT91_MATRIX_VDDIOMSEL_3_3V | AT91_MATRIX_EBI_IOSR_SEL,
&ma->ebicsa);
+
sdramc_initialize(ATMEL_BASE_CS1, &setting);
}
+
+void mem_init(void)
+{
+ unsigned int ram_size = 0;
+
+ /* Configure SDRAM for 128MB */
+ sdramc_configure(AT91_SDRAMC_NC_10);
+
+ /* Do memtest for 128MB */
+ ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
+ CONFIG_SYS_SDRAM_SIZE);
+
+ /*
+ * If 32MB or 16MB should be supported check also for
+ * expected mirroring at A16 and A17
+ * To find mirror addresses depends how the collumns are connected
+ * at RAM (internaly or externaly)
+ * If the collumns are not in inverted order the mirror size effect
+ * behaves like normal SRAM with A0,A1,A2,etc. connected incremantal
+ */
+
+ /* Mirrors at A15 on ATMEL G20 SDRAM Controller with 64MB*/
+ if (ram_size == 0x800) {
+ printf("\n\r 64MB");
+ sdramc_configure(AT91_SDRAMC_NC_9);
+ } else {
+ /* Size already initialized */
+ printf("\n\r 128MB");
+ }
+}
#endif
#ifdef CONFIG_MACB
+static void siemens_phy_reset(void)
+{
+ /*
+ * we need to reset PHY for 200us
+ * because of bug in ATMEL G20 CPU (undefined initial state of GPIO)
+ */
+ if ((readl(AT91_ASM_RSTC_SR) & AT91_RSTC_RSTTYP) ==
+ AT91_RSTC_RSTTYP_GENERAL)
+ at91_set_gpio_value(AT91_PIN_PA25, 0); /* reset eth switch */
+}
+
static void taurus_macb_hw_init(void)
{
/* Enable EMAC clock */
at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0);
at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0);
+ siemens_phy_reset();
+
at91_phy_reset();
at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */
#endif
return rc;
}
+
+#if !defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_BOARD_AXM)
+/*
+ * Booting the Fallback Image.
+ *
+ * The function is used to provide and
+ * boot the image with the fallback
+ * parameters, incase if the faulty image
+ * in upgraded over the base firmware.
+ *
+ */
+static int upgrade_failure_fallback(void)
+{
+ char *partitionset_active = NULL;
+ char *rootfs = NULL;
+ char *rootfs_fallback = NULL;
+ char *kern_off;
+ char *kern_off_fb;
+ char *kern_size;
+ char *kern_size_fb;
+
+ partitionset_active = getenv("partitionset_active");
+ if (partitionset_active) {
+ if (partitionset_active[0] == 'A')
+ setenv("partitionset_active", "B");
+ else
+ setenv("partitionset_active", "A");
+ } else {
+ printf("partitionset_active missing.\n");
+ return -ENOENT;
+ }
+
+ rootfs = getenv("rootfs");
+ rootfs_fallback = getenv("rootfs_fallback");
+ setenv("rootfs", rootfs_fallback);
+ setenv("rootfs_fallback", rootfs);
+
+ kern_size = getenv("kernel_size");
+ kern_size_fb = getenv("kernel_size_fallback");
+ setenv("kernel_size", kern_size_fb);
+ setenv("kernel_size_fallback", kern_size);
+
+ kern_off = getenv("kernel_Off");
+ kern_off_fb = getenv("kernel_Off_fallback");
+ setenv("kernel_Off", kern_off_fb);
+ setenv("kernel_Off_fallback", kern_off);
+
+ setenv("bootargs", '\0');
+ setenv("upgrade_available", '\0');
+ setenv("boot_retries", '\0');
+ saveenv();
+
+ return 0;
+}
+
+static int do_upgrade_available(cmd_tbl_t *cmdtp, int flag, int argc,
+ char * const argv[])
+{
+ unsigned long upgrade_available = 0;
+ unsigned long boot_retry = 0;
+ char boot_buf[10];
+
+ upgrade_available = simple_strtoul(getenv("upgrade_available"), NULL,
+ 10);
+ if (upgrade_available) {
+ boot_retry = simple_strtoul(getenv("boot_retries"), NULL, 10);
+ boot_retry++;
+ sprintf(boot_buf, "%lx", boot_retry);
+ setenv("boot_retries", boot_buf);
+ saveenv();
+
+ /*
+ * Here the boot_retries count is checked, and if the
+ * count becomes greater than 2 switch back to the
+ * fallback, and reset the board.
+ */
+
+ if (boot_retry > 2) {
+ if (upgrade_failure_fallback() == 0)
+ do_reset(NULL, 0, 0, NULL);
+ return -1;
+ }
+ }
+ return 0;
+}
+
+U_BOOT_CMD(
+ upgrade_available, 1, 1, do_upgrade_available,
+ "check Siemens update",
+ "no parameters"
+);
+#endif
+#endif
* In this case SoC is defined in boards.cfg.
*/
#include <asm/hardware.h>
+#include <linux/sizes.h>
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_ENV_OFFSET_REDUND 0x180000
#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0x200000 0x300000; bootm"
-#define CONFIG_BOOTARGS \
+
+#if defined(CONFIG_BOARD_TAURUS)
+#define CONFIG_BOOTARGS_TAURUS \
"console=ttyS0,115200 earlyprintk " \
"mtdparts=atmel_nand:256k(bootstrap)ro,512k(uboot)ro," \
"256k(env),256k(env_redundant),256k(spare)," \
"512k(dtb),6M(kernel)ro,-(rootfs) " \
"root=/dev/mtdblock7 rw rootfstype=jffs2"
+#endif
+
+#if defined(CONFIG_BOARD_AXM)
+#define CONFIG_BOOTARGS_AXM \
+ "\0" \
+ "addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:" \
+ "${gatewayip}:${netmask}:${hostname}:${netdev}::off\0" \
+ "addtest=setenv bootargs ${bootargs} loglevel=4 test\0" \
+ "baudrate=115200\0" \
+ "boot_file=setenv bootfile /${project_dir}/kernel/uImage\0" \
+ "boot_retries=0\0" \
+ "bootcmd=run flash_self\0" \
+ "bootdelay=3\0" \
+ "ethact=macb0\0" \
+ "flash_nfs=run nand_kernel;run nfsargs;run addip;upgrade_available;"\
+ "bootm ${kernel_ram};reset\0" \
+ "flash_self=run nand_kernel;run setbootargs;upgrade_available;" \
+ "bootm ${kernel_ram};reset\0" \
+ "flash_self_test=run nand_kernel;run setbootargs addtest; " \
+ "upgrade_available;bootm ${kernel_ram};reset\0" \
+ "hostname=systemone\0" \
+ "kernel_Off=0x00200000\0" \
+ "kernel_Off_fallback=0x03800000\0" \
+ "kernel_ram=0x21500000\0" \
+ "kernel_size=0x00400000\0" \
+ "kernel_size_fallback=0x00400000\0" \
+ "loads_echo=1\0" \
+ "nand_kernel=nand read.e ${kernel_ram} ${kernel_Off} " \
+ "${kernel_size}\0" \
+ "net_nfs=run boot_file;tftp ${kernel_ram} ${bootfile};" \
+ "run nfsargs;run addip;upgrade_available;bootm " \
+ "${kernel_ram};reset\0" \
+ "netdev=eth0\0" \
+ "nfsargs=run root_path;setenv bootargs ${bootargs} " \
+ "root=/dev/nfs rw nfsroot=${serverip}:${rootpath} " \
+ "at91sam9_wdt.wdt_timeout=16\0" \
+ "partitionset_active=A\0" \
+ "preboot=echo;echo Type 'run flash_self' to use kernel and root "\
+ "filesystem on memory;echo Type 'run flash_nfs' to use kernel " \
+ "from memory and root filesystem over NFS;echo Type 'run net_nfs' "\
+ "to get Kernel over TFTP and mount root filesystem over NFS;echo\0"\
+ "project_dir=systemone\0" \
+ "root_path=setenv rootpath /home/projects/${project_dir}/rootfs\0"\
+ "rootfs=/dev/mtdblock5\0" \
+ "rootfs_fallback=/dev/mtdblock7\0" \
+ "setbootargs=setenv bootargs ${bootargs} console=ttyMTD,mtdoops "\
+ "root=${rootfs} rootfstype=jffs2 panic=7 " \
+ "at91sam9_wdt.wdt_timeout=16\0" \
+ "stderr=serial\0" \
+ "stdin=serial\0" \
+ "stdout=serial\0" \
+ "upgrade_available=0\0"
+#endif
+
+#if defined(CONFIG_BOARD_TAURUS)
+#define CONFIG_BOOTARGS CONFIG_BOOTARGS_TAURUS
+#endif
+
+#if defined(CONFIG_BOARD_AXM)
+#define CONFIG_BOOTARGS CONFIG_BOOTARGS_AXM
+#endif
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
/* Defines for SPL */
#define CONFIG_SPL_FRAMEWORK
#define CONFIG_SPL_TEXT_BASE 0x0
-#define CONFIG_SPL_MAX_SIZE (14 * 1024)
-#define CONFIG_SPL_STACK (16 * 1024)
+#define CONFIG_SPL_MAX_SIZE (31 * SZ_512)
+#define CONFIG_SPL_STACK (ATMEL_BASE_SRAM1 + SZ_16K)
#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_TEXT_BASE - \
CONFIG_SYS_MALLOC_LEN)
#define CONFIG_SYS_SPL_MALLOC_SIZE CONFIG_SYS_MALLOC_LEN
#define CONFIG_SYS_MCKR 0x1300
#define CONFIG_SYS_MCKR_CSS (0x02 | CONFIG_SYS_MCKR)
#define CONFIG_SYS_AT91_PLLB 0x10193F05
+
#endif
projects / u-boot / commitdiff