]> git.sur5r.net Git - u-boot/commitdiff
MX25: make use of GPIO framework for MX25 processor
authorStefano Babic <sbabic@denx.de>
Sun, 21 Aug 2011 08:48:19 +0000 (10:48 +0200)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>
Sun, 4 Sep 2011 09:36:11 +0000 (11:36 +0200)
Signed-off-by: Stefano Babic <sbabic@denx.de>
arch/arm/include/asm/arch-mx25/gpio.h [new file with mode: 0644]
arch/arm/include/asm/arch-mx25/imx-regs.h

diff --git a/arch/arm/include/asm/arch-mx25/gpio.h b/arch/arm/include/asm/arch-mx25/gpio.h
new file mode 100644 (file)
index 0000000..dc6edc7
--- /dev/null
@@ -0,0 +1,45 @@
+/*
+ * Copyright (C) 2011
+ * Stefano Babic, DENX Software Engineering, <sbabic@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#ifndef __ASM_ARCH_MX25_GPIO_H
+#define __ASM_ARCH_MX25_GPIO_H
+
+/* Converts a GPIO port number and the internal bit position
+ * to the GPIO number
+ */
+#define MXC_GPIO_PORT_TO_NUM(port, bit) (((port - 1) << 5) + (bit & 0x1f))
+
+/* GPIO registers */
+struct gpio_regs {
+       u32 gpio_dr;    /* data */
+       u32 gpio_dir;   /* direction */
+       u32 psr;        /* pad satus */
+       u32 icr1;       /* interrupt config 1 */
+       u32 icr2;       /* interrupt config 2 */
+       u32 imr;        /* interrupt mask */
+       u32 isr;        /* interrupt status */
+       u32 edge_sel;   /* edge select */
+};
+
+#endif
index 2ccb445975950c21b1ff6c565dc81208b53c20c4..9e30f7c2bc6dde9d4745f075e60801cc1f64bfde 100644 (file)
@@ -84,18 +84,6 @@ struct esdramc_regs {
        u32 cdlyl;      /* delay line cycle length debug */
 };
 
-/* GPIO registers */
-struct gpio_regs {
-       u32 gpio_dr;    /* data */
-       u32 gpio_dir;   /* direction */
-       u32 psr;        /* pad satus */
-       u32 icr1;       /* interrupt config 1 */
-       u32 icr2;       /* interrupt config 2 */
-       u32 imr;        /* interrupt mask */
-       u32 isr;        /* interrupt status */
-       u32 edge_sel;   /* edge select */
-};
-
 /* General Purpose Timer (GPT) registers */
 struct gpt_regs {
        u32 ctrl;       /* control */