+commit bcab74baa6b1b1c969038ab6f64a186239180405
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Tue Jul 15 11:23:02 2008 -0400
+
+ Round the serial port clock divisor value returned by calc_divisor()
+
+ Round the serial port clock divisor value returned by
+ calc_divisor()
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+ Acked-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 0328ef0edfe950f0b7b8b368dae482531506b74a
+Author: Robin Getz <rgetz@blackfin.uclinux.org>
+Date: Tue Jul 15 21:44:46 2008 +0200
+
+ Fix DHCP protocol so U-Boot does not respond too early
+ on the network with it's offered IP number; it should not reply until
+ after it has received a DHCP ACK message. Also ensures that U-Boot
+ does it's DHCPREQUEST as broadcast (per RFC 2131).
+
+ Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
+ Acked-by: Ben Warren <biggerbadderben@gmail.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 7288f972fcaee14a9741cb08c8688a23874b4a2e
+Author: Sebastian Siewior <bigeasy@linutronix.de>
+Date: Tue Jul 15 13:35:23 2008 +0200
+
+ cfi_flash: make the command u32 only
+
+ This got changed by commit 93c56f212c
+ [cfi_flash: support of long cmd in U-boot.]
+
+ Long is the wrong type because it will behave differently on 64bit
+ machines in a way that is probably not expected. u32 should be
+ enough.
+
+ Cc: Alexey Korolev <akorolev@infradead.org>
+ Cc: Vasiliy Leonenko <vasiliy.leonenko@mail.ru>
+ Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
+
+commit 31cfe57491b183acae575d486729e158f016c27b
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Mon Jul 14 23:48:41 2008 +0200
+
+ tools/gitignore: update to all generated files
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 5e0de0e216b8fb27634afb11c60a2fa24c23349e
+Author: Andre Schwarz <andre.schwarz@matrix-vision.de>
+Date: Wed Jul 9 18:30:44 2008 +0200
+
+ mpc5xxx: Add MVBC_P board support
+
+ The MVBC_P is a MPC5200B based camera system with Intel Gigabit ethernet
+ controller (using e1000) and custom Altera Cyclone-II FPGA on PCI.
+
+ Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit e2d31fb3450653115452144363d5bde4e5e3e693
+Author: Timur Tabi <timur@freescale.com>
+Date: Thu Jun 19 17:56:11 2008 -0500
+
+ Update Freescale sys_eeprom.c to handle CCID formats
+
+ Update the sys_eeprom.c file to handle both NXID and CCID EEPROM formats. The
+ NXID format replaces the older CCID format, but it's important to support both
+ since most boards out there still use the CCID format. This change is in
+ preparation for using one file to handle both formats. This will also unify
+ EEPROM support for all Freescale 85xx and 86xx boards.
+
+ Also update the 86xx board header files to use the standard CFG_I2C_EEPROM_ADDR
+ instead of ID_EEPROM_ADDR.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+
+commit d85f46a25ccb33ed9b295de3c2cfe1ce270ece9a
+Author: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+Date: Fri Jul 11 17:22:43 2008 +0900
+
+ pci: sh: Add pci_skip_dev and pci_print_dev function
+
+ Add function of new PCI, pci_skip_dev and pci_print_dev.
+
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
+ Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+
+commit 1107014e835ec9d46c0333f4211d104f77442db0
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Jul 14 20:29:07 2008 -0500
+
+ Clean up INIT_RAM options
+
+ The L2_INIT_RAM option was unused, and recent changes to the TLB code
+ meant that the INIT_RAM TLBs weren't being cleared out. In order to reduce
+ the amount of mapped space attached to nothing, we change things so the TLBs
+ get cleared.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 4524561820a9327e89107854b3a7187800ccf719
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Jul 14 20:26:57 2008 -0500
+
+ Remove fake flash bank from 8544 DS
+
+ The fake flash bank was generating errors for anyone who didn't have a
+ PromJET hooked up to the board. As that constitutes the vast majority of
+ users, we remove it.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 630d9bfcb5f6d3a43f251901a6b480994dcb6ea3
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Jul 14 14:07:03 2008 -0500
+
+ MPC8544DS: Add ATI Video card support
+
+ Add support for using a PCIe ATI Video card on PCIe2.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 7f9f4347cf325c63a39fe30910f3fb211ae2cc15
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Jul 14 14:07:02 2008 -0500
+
+ 85xx: Add some L1/L2 SPR register definitions
+
+ Add new L1/L2 SPRs related to e500mc cache config and control.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit e5852787f0c3c442a276262f13d91ca450605ac0
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Jul 14 14:07:01 2008 -0500
+
+ MPC8544DS: Report board id, board version and fpga version.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 73f15a060f67a2462551c334215bd20fac6b81d1
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Jul 14 14:07:00 2008 -0500
+
+ 85xx: Cleanup L2 cache size detection
+
+ The L2 size detection code was a bit confusing and we kept having to add
+ code to it to handle new processors. Change the sense of detection so we
+ look for the older processors that aren't changing.
+
+ Also added support for 1M cache size on 8572.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit c3ca7e5e00a24451f20df3bded9a61ba541921df
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date: Fri Jul 11 15:33:08 2008 -0400
+
+ sbc8560: enable CONFIG_OF_LIBFDT by default
+
+ Make the default build for the sbc8560 board be powerpc
+ capable with libfdt support.
+
+ Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+
+commit 6b44a44ec2aab180d7095c1c92e669cee1d3e3bd
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Jul 14 20:04:40 2008 -0500
+
+ Fix indentation for default boot environment variables
+
+ This was proposed by Paul Gortmaker in response to Wolfgang's comments on
+ similar #defines in sbc8560.h.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 37fef499104e28e0a83b02b85ca0d1fbe80d294a
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date: Fri Jul 11 15:33:07 2008 -0400
+
+ sbc8560: add default fdt values
+
+ Add in the default fdt settings and the typical EXTRA_ENV
+ settings as borrowed from the mpc8560ads. Fix a couple
+ of stale references to the mpc8560ads dating back to the
+ original clone/fork.
+
+ Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit d04e76edf92f7f89696989e8702b97e020455af3
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date: Fri Jul 11 15:33:06 2008 -0400
+
+ sbc8560: add in ft_board_setup()
+
+ Add in for the sbc8560, the ft_board_setup() routine, based on what is
+ in use for the Freescale MPC8560ADS board.
+
+ Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+
+commit c158bcaca3b31cbe38c4143812e6170e38a57393
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date: Fri Jul 11 15:33:05 2008 -0400
+
+ sbc8560: define eth0 and eth1 instead of eth1 and eth2
+
+ The existing config doesn't define CONFIG_HAS_ETH0, and so the
+ fdt support doesn't update the zeros in the dtb local-mac with
+ real data from the u-boot env. Since the existing config is
+ tailored to just two interfaces, get rid of the ETH2 definitions
+ at the same time.
+
+ Also don't include any end user specific data into the environment
+ by default -- things like MAC address, network parameters etc. need
+ to come from the end user.
+
+ Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 0ec436d2f95076d9e46ae594db6e9b1d8732840d
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date: Fri Jul 11 15:33:04 2008 -0400
+
+ sbc8560: properly set cs0_bnds for 512MB
+
+ The sbc8560 board ships with 512MB of memory installed,
+ but the current cs0_bnds is hard coded for 256MB. Set the
+ value based on CFG_SDRAM_SIZE.
+
+ Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+
+commit 6de5bf24004c8d9c9b070bb8f7418d1c45e5eb27
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date: Fri Jul 11 15:33:03 2008 -0400
+
+ sbc8560: proper definitions for TSEC.
+
+ The definitions for the TSEC have become out of date. There is no
+ longer any such options like "CONFIG_MPC85xx_TSEC1" or similar.
+ Update to match those of other boards, like the MPC8560ADS.
+
+ Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+ Acked-by: Ben Warren <biggerbadderben@gmail.com>
+
+commit 71074abbe0c76429577aff58aeff0a24ad210b23
+Author: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date: Wed Jul 9 13:23:05 2008 -0400
+
+ 8xxx-fdt: set ns16550 clock from CFG_NS16550_CLK, not bi_busfreq
+
+ Some boards that have external 16550 UARTs don't have a direct
+ tie between bi_busfreq and the clock used for the UARTs. Boards
+ that do have such a tie should set CFG_NS16550_CLK to be
+ get_bus_freq(0) -- which most of them do already.
+
+ Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+ Acked-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 24ef76f320fbadf074105229826514db140f939f
+Author: Andrew Klossner <andrew@cesa.opbu.xerox.com>
+Date: Wed Jul 2 07:03:53 2008 -0700
+
+ Change the temp map to ROM to align addresses to page size.
+
+ With a page size of BOOKE_PAGESZ_16M, both the real and effective
+ addresses must be multiples of 16MB. The hardware silently truncates
+ them so the code happens to work. This patch clarifies the situation
+ by establishing addresses that the hardware doesn't need to truncate.
+
+ Signed-off-by: Andrew Klossner <andrew@cesa.opbu.xerox.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 06b4186c10204b6683edb047ac5f506fb0ce0937
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Jun 17 17:45:22 2008 -0500
+
+ mpc85xx: use IS_E_PROCESSOR macro
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 6b70ffb9d1b2e791161f3cf92937aa45b4a07b78
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Mon Jun 16 15:55:53 2008 -0500
+
+ fdt: add crypto node handling for MPC8{3, 5}xxE processors
+
+ Delete the crypto node if not on an E-processor. If on 8360 or 834x family,
+ check rev and up-rev crypto node (to SEC rev. 2.4 property values)
+ if on an 'EA' processor, e.g. MPC8349EA.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 85e5808e8ea9f77da5219f23394112f0b424fa5e
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Fri Jul 11 15:10:11 2008 -0400
+
+ ARM DaVinci: Remove extern phy_t declaration by moving code to proper place
+
+ ARM DaVinci: Remove extern phy_t declaration by moving
+ code to proper place.
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+
+commit 3a9e7ba2ac14018c5dd1e78a7dd735571569c971
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Fri Jul 11 15:10:10 2008 -0400
+
+ ARM DaVinci: Remove duplicate definitions of MACH_TYPE and prototype of i2c_init()
+
+ ARM DaVinci: Remove duplicate definitions of MACH_TYPE
+ and prototype of i2c_init().
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+
+commit 348753d416cd2c9e7ec6520a544c8f33cf02a560
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Jul 14 14:03:02 2008 -0500
+
+ Fix some more printf() format problems.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 45b16d22c64674ccd8c4637456a987463609141c
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Jul 14 22:38:42 2008 +0200
+
+ Fix coding style; make code better parsable by external tools
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit b880cbf207b1c109d3a661417a8feddcbd729a9d
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Jul 14 21:19:08 2008 +0200
+
+ cpu/i386/serial.c: Fix syntax errors
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit e2d45e6f4d9919e1afeac5e09557b2252832fccf
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Jul 14 20:41:35 2008 +0200
+
+ elppc board: Coding style cleanup.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 82b24a8a505fc81466484b3c55b574ee0b4205bc
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Jul 14 20:40:22 2008 +0200
+
+ elppc board: fix syntax error.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 0fe340585a6a48bd392d315b0dd84d068b1c3790
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Jul 14 20:38:26 2008 +0200
+
+ EB+MCF-EV123 board: fix coding style (alingment)
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 6841785a0bb0f38175456a923edd634fb7dd6947
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Jul 14 20:36:44 2008 +0200
+
+ EB+MCF-EV123 board: fix syntx error
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit ab5cda9f88c3eaf9cf599adc3a3375906c4ed904
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Jul 7 18:02:08 2008 -0500
+
+ Remove LBC_CACHE_BASE from 8544 DS
+
+ The 8544 DS doesn't have any cacheable Local Bus memories set up. By mapping
+ space for some anyway, we were allowing speculative loads into unmapped space,
+ which would cause an exception (annoying, even if ultimately harmless).
+ Removing LBC_CACHE_BASE, and using LBC_NONCACHE_BASE for the LBC LAW solves the
+ problem.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit d0ff51ba5d0309dbe9e25ea54f8a0285a6d5db90
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Jul 14 15:19:07 2008 +0200
+
+ Code cleanup: fix old style assignment ambiguities like "=-" etc.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d7854223c5c85b5849fbf422cc8ac0efef461c37
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Jul 14 15:10:53 2008 +0200
+
+ AmigaOneG3SE: remove dead and incomplete files
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit b64f190b7a34224df09b559ca111eb1b733f00ad
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Jul 14 15:06:35 2008 +0200
+
+ Fix printf() format issues with sizeof_t types by using %zu
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit f354b73e16a86f9e9085471a830605f74f84ea5d
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Mon Jul 14 14:11:45 2008 +0200
+
+ vsprintf: add z and t options
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 25dbe98abb686d8210e1731fba85ced7d3ce874c
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Jul 13 23:07:35 2008 +0200
+
+ Fix some more printf() format issues.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d5996dd555edf52721b7691a4c59de016251ed39
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Jul 13 19:51:00 2008 +0200
+
+ Fix some more printf() format problems.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 0f9d5f6d6e814907794995c6a22af752040c35d9
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Jul 13 19:48:26 2008 +0200
+
+ ADS5121: Fix (delete) incorrect ads5121_diu_init() prototype
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 322716a1d1eb33a71067ba0eb1c5346fb2dd6b34
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Sat Jul 12 17:31:36 2008 +0200
+
+ Fix bug in Lime video driver
+
+ We need to wait while drawing engine clears frame
+ buffer before any further software accesses to frame
+ buffer will be initiated. Otherwise software drawn
+ parts could be partially destroyed by the drawing
+ engine or even GDC chip freeze could occur (as
+ observed on socrates board).
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+
+commit 0a5676befb0c590212a53f7627fa5d0d8a84bf34
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Sat Jul 12 14:36:34 2008 +0200
+
+ Fix some more printf() format issues.
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit 18c8a28aad49803780bd8d52432ded528e37e701
+Author: Michal Simek <monstr@monstr.eu>
+Date: Fri Jul 11 15:11:57 2008 +0200
+
+ hwmon: rename CONFIG_DS1722 to CONFIG_DTT_DS1722
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit 6ecbb45bb027e90c19d63b48e7b0c05acc1a87c0
+Author: Michal Simek <monstr@monstr.eu>
+Date: Fri Jul 11 11:50:53 2008 +0200
+
+ hwmon: Cleaning hwmon devices
+
+ Clean Makefile
+ Move device specific values to driver for better reading
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit c78fce699c7ff467ecd841da6a79f065180bf578
+Author: Michal Simek <monstr@monstr.eu>
+Date: Fri Jul 11 10:43:13 2008 +0200
+
+ FIS: repare incorrect return value with ramdisk handling
+
+ Microblaze and PowerPC use boot_get_ramdisk for loading
+ ramdisk to memory with checking return value.
+ Return 0 means success. Return 1 means failed.
+ Here is correspond part of code from bootm.c which check
+ return code.
+
+ ret = boot_get_ramdisk (argc, argv, images, IH_ARCH_PPC,
+ &rd_data_start, &rd_data_end);
+ if (ret)
+ goto error;
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit 84a2c64a26dc5e275e1cf4e76a6e194a18fb5477
+Author: Michal Simek <monstr@monstr.eu>
+Date: Fri Jul 11 10:10:32 2008 +0200
+
+ microblaze: Remove useless ancient headers
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit 53ea981c3124b13c137c2d10e975b7c6672266e0
+Author: Michal Simek <monstr@monstr.eu>
+Date: Fri Jul 11 10:10:31 2008 +0200
+
+ microblaze: Clean uartlite driver
+
+ Redesign uartlite driver to in_be32 and out_be32 macros
+ Fix missing header in io.h
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+ Acked-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit dbf3dfb386a2d5d2381814e39985ab2e21894550
+Author: Marcel Ziswiler <marcel@ziswiler.com>
+Date: Fri Jul 11 02:39:14 2008 +0200
+
+ Enable passing of ATAGs required by latest Linux kernel.
+
+commit ef130d3093bdf88f01cf3e000fe5df249ebf2b1a
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Fri Jul 11 10:24:15 2008 -0400
+
+ Fix integer overflow warning in calc_divisor()
+
+ which happened when rounding the serial port clock divisor
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+
+commit 6b760189d77f001684e3160b355c185ca3804961
+Author: Marcel Ziswiler <marcel@ziswiler.com>
+Date: Fri Jul 11 01:09:59 2008 +0200
+
+ Fix build time warnings in function mmc_decode_csd()
+
+ Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
+
+commit c15947d6ce0d59925c97fdfac692476af6e262d0
+Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+Date: Thu Jul 10 10:46:33 2008 -0400
+
+ ARM: Fix for broken compilation when defining CONFIG_CMD_ELF
+
+ caused by missing dcache status/enable/disable functions.
+
+ Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
+
+commit 068c1b77c8f42a1a31084d2f4b1d5cc807c1a9ce
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jul 10 13:53:31 2008 +0200
+
+ ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boards
+
+ This patch removes some ft_board_setup() functions from some 4xx boards.
+ This can be done since we now have a default weak implementation for this
+ in cpu/ppc4xx/fdt.c. Only board in need for a different/custom
+ implementation like canyonlands need their own version.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d39a089f8bc960ba9ae6a08fda5582b578620cc1
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Jul 13 14:58:16 2008 +0200
+
+ Add last known maintainer for orphaned boards; reformat.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 5c761d57bb9940e016d561fda8b2ed84c55de5b6
+Author: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+Date: Thu Jul 10 13:16:04 2008 +0200
+
+ Remove kharris@nexus-tech.net from MAINTAINERS
+
+ Mail to kharris@nexus-tech.net bounces because the user doesn't exist
+ anymore. You can't be a maintainer without a valid e-mail address, so
+ move all boards that used to be maintained by Kyle Harris to the
+ "orphaned" list.
+
+ Currently, only PowerPC has a list of orphaned boards, so this patch
+ creates one for ARM as well.
+
+ Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
+
+commit 17bd17071463b0cde391ac4a0863d600474b4ea1
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Thu Jul 10 01:15:10 2008 +0200
+
+ at91: Fix to enable using Teridian MII phy (78Q21x3) with at91sam9260
+
+ On the at91sam9260ep development board there is an EEPROM
+ connected to the TWI interface (PA23, PA24 Peripheral A
+ multiplexing), so we cannot use these pins as ETX2, ETX3.
+ This patch configures PA10, PA11 pins for ETX2, ETX3
+ instead of PA23, PA24 pins.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+ Signed-off-by: Manuel Sahm <Manuel.Sahm@feig.de>
+
+commit f889265753ddf4465d9d580827bb9289bfac55d6
+Author: Kenneth Johansson <kenneth@southpole.se>
+Date: Sat Jul 12 13:18:34 2008 -0600
+
+ fix DIU for small screens
+
+ The DIU_DIV register is 8 bit not 5 bit. This prevented large DIV values
+ so it was not possible to set a slow pixel clock and thus prevented
+ display on small screens.
+
+ Signed-off-by: Kenneth Johansson <kenneth@southpole.se>
+ Acked-by: John Rigby <jrigby@freescale.com>
+
+commit b60b8573875e650e4c69be667bfc88d3ed474a7c
+Author: John Rigby <jrigby@freescale.com>
+Date: Fri Jul 11 14:44:09 2008 -0600
+
+ ADS5121 cleanup compile warnings
+
+ board/ads5121/iopin.c
+ Replace bit fields in struct iopin_t with a single
+ field and intialize it via plain old macros.
+ This fixes the type pun warnings and makes the code
+ more readable.
+
+ board/ads5121/ads5121.c
+ Add include iopin.h to ads5121.c for the iopin_initialize
+ prototype.
+
+ Add an extern void ads5121_diu_init(void)
+
+ Signed-off-by: John Rigby <jrigby@freescale.com>
+
+commit bde63587622c4b830a27d1ddf7265843de9e994f
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Jul 11 22:56:11 2008 +0200
+
+ Fix some more printf() format issues.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 184f1b404a90eef8b425c0e7b3018d59ef9982c8
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Jul 11 22:55:31 2008 +0200
+
+ Fixed some out-of-tree build issues
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 47bf9c71ae838305a3ea3161af8d14e6f3fc2c82
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jul 9 16:20:23 2008 -0500
+
+ ColdFire: Fix FB CS not setup properly for Mcf5282
+
+ Remove all CFG_CSn_RO in cpu/mcf52x2/cpu_init.c. If
+ CFG_CSn_RO is defined as 0, the chipselect will not
+ be assigned.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit bc3ccb139f0836f0a834cfd370a120a00ad7e63a
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jul 9 15:47:27 2008 -0500
+
+ ColdFire: Fix incorrect define for mcf5227x and mcf5445x RTC
+
+ Rename CONFIG_MCFTMR to CONFIG_MCFRTC to include real time
+ clock module in cpu/<cf arch>/cpu_init.c
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit f94945b517f10e01927101679c62361e03d4e837
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jul 9 15:25:01 2008 -0500
+
+ ColdFire: Fix incorrect board name in MAKEALL for M5253EVBE
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 0e0c4357d14a3563c6a2a1e6d5ad6a2cc4f35cab
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jul 9 15:21:44 2008 -0500
+
+ Fix compile error caused by missing timer function
+
+ Add #define CONFIG_MCFTMR in EB+MCF-EV123.h configuration file
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit c37ea031175b807c54e6bad9b270e9bede6c0078
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jul 9 15:14:25 2008 -0500
+
+ Fix compile error caused by incorrect function return type
+
+ Rename int mii_init(void) to void mii_init(void)
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit ab4860b255239dbaecccdd002c8d11f4ef54dd75
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jun 18 19:27:23 2008 -0500
+
+ ColdFire: Fix power up issue for MCF5235
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit dd08e97361fbc9e79fa5ef1a8acf29273b934b11
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jun 18 19:19:07 2008 -0500
+
+ ColdFire: Fix compiling error for MCF5275
+
+ The compiling error was caused by missing a closed parentheses
+ in speed.c
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 94603c2fd4dbe0655878416aa0da9f302d4c30d3
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jun 18 19:14:01 2008 -0500
+
+ ColdFire: Fix timer issue for MCF5272
+
+ The timer was assigned to wrong timer memory mapped which
+ caused udelay() and timer() not working properly.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 3b1e8ac9b43f89cc9291a6a86e6b33ef55801515
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jun 18 19:12:13 2008 -0500
+
+ ColdFire: Change invalid JMP to BRA caught by new v4e toolchain
+
+ Signed-off-by: Kurt Mahan <kmahan@freescale.com>
+
+commit 8371dc2066136be21e10b7b9293e469297d77298
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jun 18 19:05:23 2008 -0500
+
+ ColdFire: Add -got=single param for new linux v4e toolchains
+
+ Signed-off-by: Kurt Mahan <kmahan@freescale.com>
+
+commit 56d52615cd47bc522ee13bb7ec7e59d6ce9426c7
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Jun 18 13:21:19 2008 -0500
+
+ ColdFire: Fix code flash configuration for M547x/M548x boards
+
+ Signed-off-by: Kurt Mahan <kmahan@freescale.com>
+
+commit 6e37091afc07fdcc15590093fd066b0cb7399f85
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Tue Jun 24 12:12:16 2008 -0500
+
+ ColdFire: Fix warning messages by passing correct data type in board.c
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit 81cc32322acb1b3225ee45606ced48e2a14824dc
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Thu May 29 12:21:54 2008 -0500
+
+ ColdFire: Fix UART baudrate formula
+
+ The formula "counter = (u32) (gd->bus_clk / gd->baudrate) / 32"
+ can generate the wrong divisor due to integer division truncation.
+ Round the calculated divisor value by adding 1/2 the baudrate
+ before dividing by the baudrate.
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+ Acked-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit b578fb471444cbd7db1285701ba51343baaf73fb
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jul 10 11:38:26 2008 +0200
+
+ ppc4xx: Fix include sequence in 4xx_pcie.c
+
+ This patch now moves common.h to the top of the inlcude list. This
+ is needed for boards with CONFIG_PHYS_64BIT set (e.g. katmai), so that
+ the phys_size_t/phys_addr_t are defined to the correct size in this
+ driver.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9b55a2536919f4de1bb1044e6eb8262c2f53bc96
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Jul 11 01:16:00 2008 +0200
+
+ Fix some more print() format errors.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit fdd70d1921b87287d9a99d1be99bc35226c2b412
+Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+Date: Thu Jul 10 20:57:54 2008 +0200
+
+ MAKEALL: remove duplicated at91 from ARM9 list and add LIST_at91 to arm
+
+ Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
+
+commit c6457e3b8bc79a97381cf7deffa08f7c5a24f86c
+Author: Sergey Lapin <slapin@ossfans.org>
+Date: Thu Jun 5 11:06:29 2008 +0400
+
+ DataFlash AT45DB021 support
+
+ Some boards based on AT91SAM926X-EK use smaller DF chips to keep
+ bootstrap, u-boot and its environment, using NAND or other external
+ storage for kernel and rootfs. This patch adds support for
+ small 1024x263 chip.
+
+ Signed-off-by: Sergey Lapin <slapin@ossfans.org>
+
+commit 4109df6f75fc00ab7da56d286ba50149a0d16a69
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Jul 10 14:00:15 2008 -0500
+
+ silence misc printf formatting compiler warnings
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 3d71c81a9bb03f866a1e98da96363ef3f46c76b3
+Author: Markus Klotzbücher <mk@denx.de>
+Date: Thu Jul 10 14:47:09 2008 +0200
+
+ USB: shutdown USB before booting
+
+ This patch fixes a potentially serious issue related to USB which was
+ discouvered by Martin Krause <martin.krause@tqs.de> and fixed for
+ ARM920T. Martin wrote:
+
+ Turn off USB to prevent the host controller from writing to the
+ SDRAM while Linux is booting. This could happen, because the HCCA
+ (Host Controller Communication Area) lies within the SDRAM and the
+ host controller writes continously to this area (as busmaster!), for
+ example to increase the HccaFrameNumber variable, which happens
+ every 1 ms.
+
+ This is a slightly modified version of the patch in order to shutdown
+ USB when booting on all architectures.
+
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
+commit f31c49db2a5e076f415c0785eb37f67f2faa5fc8
+Author: Martha Marx <mmarx@silicontkx.com>
+Date: Thu May 29 14:23:25 2008 -0400
+
+ Configuration changes for ADS5121 Rev 3
+
+ ADS5121 Rev 3 board is now the default config
+
+ config targets are now
+
+ ads5121_config
+ Rev 3 board with
+ PCI
+ M41T62 on board RTC
+ 512MB DRAM
+
+ ads5121_rev2_config
+ Rev 2 board with
+ No PCI
+ 256MB DRAM
+
+ Signed-off-by: Martha Marx <mmarx@silicontkx.com>
+ Acked-by: Grant Likely <grant.likely@secretlab.ca>
+ Acked-by: John Rigby <jrigby@freescale.com>
+
+commit 16bee7b0dc294ee01ca2434aa1dd3bd717a69615
+Author: Martha Marx <mmarx@silicontkx.com>
+Date: Thu May 29 15:37:21 2008 -0400
+
+ Consolidate ADS5121 IO Pin configuration
+
+ Consolidate ADS5121 IO Pin configuration to one file
+ board/ads5121/iopin.c.
+
+ Remove pin config from cpu/mpc512x/fec.c
+
+ Signed-off-by: Martha Marx <mmarx@silicontkx.com>
+ Acked-by: Grant Likely <grant.likely@secretlab.ca>
+ Acked-by: John Rigby <jrigby@freescale.com>
+
+commit d4692b0ba83b7b454bbd92bad1f4befe6e1657b7
+Author: Christian Eggers <christian@p2400.wgnetz.xx>
+Date: Fri Jun 27 19:46:51 2008 +0200
+
+ Fix "usb part" command
+
+ Only print partition for selected device if user supplied the <dev>
+ arg with the "usb part [dev]" command.
+
+ Signed-off-by: Christian Eggers <ceggers@gmx.de>
+ Acked-by: Markus Klotzbuecher <mk@denx.de>
+
+commit cc83b27217f7380041fea386ddb6d6d9b261617d
+Author: Harald Welte <laforge@gnumonks.org>
+Date: Mon Jul 7 00:58:05 2008 +0800
+
+ fix USB devices with multiple configurations
+
+ This patch fixes bugs in usbdcore*.c related to the use of devices
+ with multiple configurations.
+
+ The original code made mistakes about the meaning of configuration value and
+ configuration index, and the resulting off-by-one errors resulted in:
+
+ * SET_CONFIGURATION always selected the first configuration, no matter what
+ wValue is being passed.
+ * GET_DESCRIPTOR/CONFIGURATION always returned the descriptor for the first
+ configuration (index 0).
+
+ Signed-off-by: Harald Welte <laforge@openmoko.org>
+ Acked-by: Markus Klotzbuecher <mk@denx.de>
+
+commit 06c53beae1a726e707971c555613f09b270a2461
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Jul 10 13:16:09 2008 +0200
+
+ Fix some more print() format errors.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d4b5f3fa001228d76e2c3380cedadf804b802c2a
+Author: Christian Eggers <christian@p2400.wgnetz.xx>
+Date: Fri Jun 27 19:46:51 2008 +0200
+
+ Fix "usb part" command
+
+ Only print partition for selected device if user supplied the <dev>
+ arg with the "usb part [dev]" command.
+
+ Signed-off-by: Christian Eggers <ceggers@gmx.de>
+ Acked-by: Markus Klotzbuecher <mk@denx.de>
+
+commit e73b5212e0463a3db0af0a5c95c75bfb762ca973
+Author: Harald Welte <laforge@gnumonks.org>
+Date: Mon Jul 7 00:58:05 2008 +0800
+
+ fix USB devices with multiple configurations
+
+ This patch fixes bugs in usbdcore*.c related to the use of devices
+ with multiple configurations.
+
+ The original code made mistakes about the meaning of configuration value and
+ configuration index, and the resulting off-by-one errors resulted in:
+
+ * SET_CONFIGURATION always selected the first configuration, no matter what
+ wValue is being passed.
+ * GET_DESCRIPTOR/CONFIGURATION always returned the descriptor for the first
+ configuration (index 0).
+
+ Signed-off-by: Harald Welte <laforge@openmoko.org>
+ Acked-by: Markus Klotzbuecher <mk@denx.de>
+
+commit e870690bdca154943ecadd5212d2d59c1b9d391b
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jul 10 10:10:54 2008 +0200
+
+ MTD/NAND: Fix printf format warning in nand code
+
+ This patch fixes NAND related printf format warning. Those warnings are
+ now visible since patch dc4b0b38d4aadf08826f6c31270f1eecd27964fd
+ [Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is
+ really helpful.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 10943c9afa25694bd9999461f4e9e50ce22fff2b
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jul 10 10:00:45 2008 +0200
+
+ rtc: Fix printf format warning in m41t60.c
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit dc1da42f814cd71e6756c2cf62af1ada1d0581fb
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jul 8 12:01:47 2008 +0200
+
+ pci: Move PCI device configuration check into a separate weak function
+
+ This patch moves the check, if a device should be skipped in PCI PNP
+ configuration into the function pci_skip_dev(). This function is defined
+ as weak so that it can be overwritten by a platform specific one if
+ needed. The check if the device should get printed in the PCI summary upon
+ bootup (when CONFIG_PCI_SCAN_SHOW is defined) is moved to the function
+ pci_print_dev() which is also defined as weak too.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit b002144e1dc21374b1ef5281fe6b5d014af96650
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jul 10 09:58:06 2008 +0200
+
+ ppc4xx: Fix printf format warnings now visible with the updated format check
+
+ This patch fixes ppc4xx related printf format warning. Those warnings are
+ now visible since patch dc4b0b38d4aadf08826f6c31270f1eecd27964fd
+ [Fix printf errors.] by Andrew Klossner has been applied. Thanks, this is
+ really helpful.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5d812b8b4ad9667c77a5bf92b4ba81699abc9fc3
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jul 9 17:33:57 2008 +0200
+
+ ppc4xx: Enable support for > 2GB SDRAM on AMCC Katmai
+
+ Newer PPC's like 440SPe, 460EX/GT can be equipped with more than 2GB of SDRAM.
+ To support such configurations, we "only" map the first 2GB via the TLB's. We
+ need some free virtual address space for the remaining peripherals like, SoC
+ devices, FLASH etc.
+
+ Note that ECC is currently not supported on configurations with more than 2GB
+ SDRAM. This is because we only map the first 2GB on such systems, and therefore
+ the ECC parity byte of the remaining area can't be written.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cf1c2ed91df26903b956948f37f82de9e1158a89
+Author: Larry Johnson <lrj@acm.org>
+Date: Sat Jun 14 17:02:49 2008 -0400
+
+ ppc4xx: Remove implementation of testdram() from Korat board support
+
+ Signed-off-by: Larry Johnson <lrj@acm.org>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 47ce4a28ccfcfb803aa68d3d4505a8de056a8a5e
+Author: Larry Johnson <lrj@acm.org>
+Date: Sat Jun 14 16:53:02 2008 -0400
+
+ ppc4xx: Update and add FDT to Korat board support
+
+ Signed-off-by: Larry Johnson <lrj@acm.org>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4188f0491886b3b486164e819c0a83fdb97efd7d
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Jul 10 01:13:30 2008 +0200
+
+ Minor coding style cleanup; update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
commit 8915f1189c1d29d8be7f4de325702d90a8988219
Author: Paul Gortmaker <paul.gortmaker@windriver.com>
Date: Wed Jul 9 17:50:45 2008 -0400
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
+commit 3473ab737282b08ad61841fcbb14c4d264a93a8e
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Tue May 13 11:50:36 2008 +0800
+
+ Feed the watchdog in u-boot for 8610 board.
+
+ The watchdog on 8610 board is enabled by setting sw[6]
+ to on. Once enabled, the watchdog can not be disabled
+ by software. So feed the dog in u-boot is necessary for
+ normal operation.
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
commit 63676841ca2d603b13765f3f7b72ff1a61c23f90
Author: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Date: Wed Jun 18 12:10:33 2008 -0400
Signed-off-by: Juergen Kilb <J.Kilb@gmx.de>
Acked-by: Felix Radensky <felix@embedded-sol.com>
+commit dd1c5523d6f44e842e69f2fcb50788c6060eab86
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jul 1 17:03:19 2008 +0200
+
+ ppc4xx: Fix 460EX/GT PCIe port initialization
+
+ This patch fixes a bug where the 460EX/GT PCIe UTLSET1 register was
+ configured incorrectly. Thanks to Olga Buchonina from AMCC for pointing
+ this out.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
commit b571afde0295b007a45055ee49f8822c753a5651
Author: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Date: Sat Jun 7 12:29:52 2008 +0200
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
+commit a036b0443657fe0f4773786de9092251869f08ac
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Jun 19 01:45:50 2008 -0500
+
+ MPC8610HPCD: Report board id, board version and fpga version.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 7de8c21f14df9c20fdcf6027aec8e8545f75f835
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Jun 19 01:45:27 2008 -0500
+
+ MPC8641HPCN: Report board id, board version and fpga version.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
commit fb8c061ea05fc68d37e2a8b9f8c949d76c8d71a8
Author: Stefan Roese <sr@denx.de>
Date: Mon Jun 16 10:40:02 2008 +0200
N: Andre Schwarz
E: andre.schwarz@matrix-vision.de
-D: Support for Matrix Vision boards (MVBLM7)
+D: Support for Matrix Vision boards (MVBLM7/MVBC_P)
N: Robert Schwebel
E: r.schwebel@pengutronix.de
Andre Schwarz <andre.schwarz@matrix-vision.de>
+ mvbc_p MPC5200
mvblm7 MPC8343
Timur Tabi <timur@freescale.com>
mecp5200 \
motionpro \
munices \
+ MVBC_P \
o2dnt \
pf5200 \
PM520 \
VERSION = 1
PATCHLEVEL = 3
-SUBLEVEL = 3
-EXTRAVERSION =
+SUBLEVEL = 4
+EXTRAVERSION = -rc1
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
VERSION_FILE = $(obj)include/version_autogenerated.h
BC3450_config: unconfig
@$(MKCONFIG) -a BC3450 ppc mpc5xxx bc3450
+cm5200_config: unconfig
+ @$(MKCONFIG) -a cm5200 ppc mpc5xxx cm5200
+
cpci5200_config: unconfig
@$(MKCONFIG) -a cpci5200 ppc mpc5xxx cpci5200 esd
jupiter_config: unconfig
@$(MKCONFIG) jupiter ppc mpc5xxx jupiter
-v38b_config: unconfig
- @$(MKCONFIG) -a v38b ppc mpc5xxx v38b
-
inka4x0_config: unconfig
@$(MKCONFIG) inka4x0 ppc mpc5xxx inka4x0
mecp5200_config: unconfig
@$(MKCONFIG) mecp5200 ppc mpc5xxx mecp5200 esd
+motionpro_config: unconfig
+ @$(MKCONFIG) motionpro ppc mpc5xxx motionpro
+
munices_config: unconfig
@$(MKCONFIG) munices ppc mpc5xxx munices
+MVBC_P_config: unconfig
+ @mkdir -p $(obj)include
+ @mkdir -p $(obj)board/mvbc_p
+ @ >$(obj)include/config.h
+ @[ -z "$(findstring MVBC_P,$@)" ] || \
+ { echo "#define CONFIG_MVBC_P" >>$(obj)include/config.h; }
+ @$(MKCONFIG) -n $@ -a MVBC_P ppc mpc5xxx mvbc_p matrix_vision
+
o2dnt_config: unconfig
@$(MKCONFIG) o2dnt ppc mpc5xxx o2dnt
smmaco4_config: unconfig
@$(MKCONFIG) -a smmaco4 ppc mpc5xxx tqm5200 tqc
-cm5200_config: unconfig
- @$(MKCONFIG) -a cm5200 ppc mpc5xxx cm5200
-
spieval_config: unconfig
@$(MKCONFIG) -a spieval ppc mpc5xxx tqm5200 tqc
{ echo "TEXT_BASE = 0xFFF00000" >$(obj)board/tqm5200/config.tmp ; \
}
@$(MKCONFIG) -n $@ -a TQM5200 ppc mpc5xxx tqm5200 tqc
+
uc101_config: unconfig
@$(MKCONFIG) uc101 ppc mpc5xxx uc101
-motionpro_config: unconfig
- @$(MKCONFIG) motionpro ppc mpc5xxx motionpro
+v38b_config: unconfig
+ @$(MKCONFIG) -a v38b ppc mpc5xxx v38b
#########################################################################
## MPC512x Systems
#########################################################################
+
ads5121_config \
ads5121_rev2_config \
: unconfig
}
@$(MKCONFIG) -a $(call xtract_4xx,$@) ppc ppc4xx PPChameleonEVB dave
+CMS700_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc ppc4xx cms700 esd
+
CPCI2DP_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci2dp esd
sbc405_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx sbc405
+sc3_config:unconfig
+ @$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3
+
sequoia_config \
rainier_config: unconfig
@mkdir -p $(obj)include
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
-sc3_config:unconfig
- @$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3
-
taihu_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc
VOM405_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx vom405 esd
-CMS700_config: unconfig
- @$(MKCONFIG) $(@:_config=) ppc ppc4xx cms700 esd
-
W7OLMC_config \
W7OLMG_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx w7o
M5282EVB_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5282evb
-TASREG_config : unconfig
- @$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
-
M5329AFEE_config \
M5329BFEE_config : unconfig
@case "$@" in \
fi
@$(MKCONFIG) -a M5485EVB m68k mcf547x_8x m548xevb freescale
+TASREG_config : unconfig
+ @$(MKCONFIG) $(@:_config=) m68k mcf52x2 tasreg esd
+
#########################################################################
## MPC83xx Systems
#########################################################################
PCIPPC6_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx pcippc2
-ZUMA_config: unconfig
- @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
-
ppmc7xx_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc 74xx_7xx ppmc7xx
+ZUMA_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc 74xx_7xx evb64260
+
#========================================================================
# ARM
#========================================================================
kb9202_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t kb9202 NULL at91rm9200
-mp2usb_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
-
m501sk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t m501sk NULL at91rm9200
+mp2usb_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm920t mp2usb NULL at91rm9200
+
#########################################################################
## Atmel ARM926EJ-S Systems
#########################################################################
cp1026_config: unconfig
@board/integratorcp/split_by_variant.sh $@
+davinci_dvevm_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs dv-evm davinci davinci
+
+davinci_schmoogie_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
+
+davinci_sffsdr_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci
+
+davinci_sonata_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
+
lpd7a400_config \
lpd7a404_config: unconfig
@$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
omap1510inn_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn
-omap5912osk_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk NULL omap
-
-davinci_dvevm_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs dv-evm davinci davinci
-
-davinci_schmoogie_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
-
-davinci_sffsdr_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs sffsdr davinci davinci
-
-davinci_sonata_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
-
xtract_omap1610xxx = $(subst _cs0boot,,$(subst _cs3boot,,$(subst _cs_autoboot,,$(subst _config,,$1))))
omap1610inn_config \
fi;
@$(MKCONFIG) -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn NULL omap
+omap5912osk_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk NULL omap
+
xtract_omap730p2 = $(subst _cs0boot,,$(subst _cs3boot,, $(subst _config,,$1)))
omap730p2_config \
VCMA9_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t vcma9 mpl s3c24x0
-#========================================================================
+#########################################################################
# ARM supplied Versatile development boards
-#========================================================================
+#########################################################################
+
+cm4008_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695
+
+cm41xx_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm920t cm41xx NULL ks8695
+
versatile_config \
versatileab_config \
versatilepb_config : unconfig
voiceblue_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm925t voiceblue
-cm4008_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t cm4008 NULL ks8695
-
-cm41xx_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm920t cm41xx NULL ks8695
-
#########################################################################
## S3C44B0 Systems
#########################################################################
#########################################################################
## ARM1136 Systems
#########################################################################
-omap2420h4_config : unconfig
- @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
apollon_config : unconfig
@mkdir -p $(obj)include
mx31ads_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads NULL mx31
+omap2420h4_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
+
#========================================================================
# i386
#========================================================================
#########################################################################
## MIPS32 AU1X00
#########################################################################
+
dbau1000_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_DBAU1000 1" >$(obj)include/config.h
@echo "#define CONFIG_DBAU1550 1" >$(obj)include/config.h
@$(MKCONFIG) -a dbau1x00 mips mips dbau1x00
+gth2_config : unconfig
+ @mkdir -p $(obj)include
+ @echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
+ @$(MKCONFIG) -a gth2 mips mips gth2
+
pb1000_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_PB1000 1" >$(obj)include/config.h
@$(MKCONFIG) -a pb1x00 mips mips pb1x00
-gth2_config: unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_GTH2 1" >$(obj)include/config.h
- @$(MKCONFIG) -a gth2 mips mips gth2
-
-qemu_mips_config: unconfig
+qemu_mips_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_QEMU_MIPS 1" >$(obj)include/config.h
@$(MKCONFIG) -a qemu-mips mips mips qemu-mips
## Nios32
#########################################################################
+ADNPESC1_DNPEVA2_base_32_config \
+ADNPESC1_base_32_config \
+ADNPESC1_config: unconfig
+ @mkdir -p $(obj)include
+ @[ -z "$(findstring _DNPEVA2,$@)" ] || \
+ { echo "#define CONFIG_DNPEVA2 1" >>$(obj)include/config.h ; \
+ $(XECHO) "... DNP/EVA2 configuration" ; \
+ }
+ @[ -z "$(findstring _base_32,$@)" ] || \
+ { echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
+ $(XECHO) "... NIOS 'base_32' configuration" ; \
+ }
+ @[ -z "$(findstring ADNPESC1_config,$@)" ] || \
+ { echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
+ $(XECHO) "... NIOS 'base_32' configuration (DEFAULT)" ; \
+ }
+ @$(MKCONFIG) -a ADNPESC1 nios nios adnpesc1 ssv
+
DK1C20_safe_32_config \
DK1C20_standard_32_config \
DK1C20_config: unconfig
}
@$(MKCONFIG) -a DK1S10 nios nios dk1s10 altera
-ADNPESC1_DNPEVA2_base_32_config \
-ADNPESC1_base_32_config \
-ADNPESC1_config: unconfig
- @mkdir -p $(obj)include
- @[ -z "$(findstring _DNPEVA2,$@)" ] || \
- { echo "#define CONFIG_DNPEVA2 1" >>$(obj)include/config.h ; \
- $(XECHO) "... DNP/EVA2 configuration" ; \
- }
- @[ -z "$(findstring _base_32,$@)" ] || \
- { echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
- $(XECHO) "... NIOS 'base_32' configuration" ; \
- }
- @[ -z "$(findstring ADNPESC1_config,$@)" ] || \
- { echo "#define CONFIG_NIOS_BASE_32 1" >>$(obj)include/config.h ; \
- $(XECHO) "... NIOS 'base_32' configuration (DEFAULT)" ; \
- }
- @$(MKCONFIG) -a ADNPESC1 nios nios adnpesc1 ssv
-
#########################################################################
## Nios-II
#########################################################################
@$(MKCONFIG) PCI5441 nios2 nios2 pci5441 psyent
#========================================================================
-# MicroBlaze
-#========================================================================
-#########################################################################
## Microblaze
-#########################################################################
-suzaku_config: unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_SUZAKU 1" > $(obj)include/config.h
- @$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
+#========================================================================
ml401_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_ML401 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) microblaze microblaze ml401 xilinx
+suzaku_config: unconfig
+ @mkdir -p $(obj)include
+ @echo "#define CONFIG_SUZAKU 1" > $(obj)include/config.h
+ @$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
+
xupv2p_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_XUPV2P 1" > $(obj)include/config.h
#========================================================================
# AVR32
#========================================================================
-#########################################################################
-## AT32AP70xx
-#########################################################################
+
+atngw100_config : unconfig
+ @$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
atstk1002_config : unconfig
@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
atstk1006_config : unconfig
@$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap700x
-atngw100_config : unconfig
- @$(MKCONFIG) $(@:_config=) avr32 at32ap atngw100 atmel at32ap700x
-
-#########################################################################
-#########################################################################
-#########################################################################
+#========================================================================
+# SH3 (SuperH)
+#========================================================================
#########################################################################
## sh3 (Renesas SuperH)
#########################################################################
+
mpr2_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MPR2 1" > $(obj)include/config.h
#########################################################################
## sh4 (Renesas SuperH)
#########################################################################
+
+MigoR_config : unconfig
+ @mkdir -p $(obj)include
+ @echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
+ @./mkconfig -a $(@:_config=) sh sh4 MigoR
+
ms7750se_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_MS7750SE 1" > $(obj)include/config.h
@echo "#define CONFIG_MS7722SE 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh4 ms7722se
-MigoR_config : unconfig
+r2dplus_config : unconfig
@mkdir -p $(obj)include
- @echo "#define CONFIG_MIGO_R 1" > $(obj)include/config.h
- @./mkconfig -a $(@:_config=) sh sh4 MigoR
+ @echo "#define CONFIG_R2DPLUS 1" > $(obj)include/config.h
+ @./mkconfig -a $(@:_config=) sh sh4 r2dplus
r7780mp_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_R7780MP 1" > $(obj)include/config.h
@./mkconfig -a $(@:_config=) sh sh4 r7780mp
-r2dplus_config : unconfig
- @mkdir -p $(obj)include
- @echo "#define CONFIG_R2DPLUS 1" > $(obj)include/config.h
- @./mkconfig -a $(@:_config=) sh sh4 r2dplus
-
sh7763rdp_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_SH7763RDP 1" > $(obj)include/config.h
#========================================================================
# SPARC
#========================================================================
+
#########################################################################
## LEON3
#########################################################################
phys_size_t initdram (int board_type)
{
- int size,i;
+ int size, i;
size = 0;
- MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6
- | MCFSDRAMC_DCR_RC((15 * CFG_CLK)>>4);
- #ifdef CFG_SDRAM_BASE0
-
- MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE(CFG_SDRAM_BASE0)
- | MCFSDRAMC_DACR_CASL(1)
- | MCFSDRAMC_DACR_CBM(3)
- | MCFSDRAMC_DACR_PS_16);
-
- MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M
- | MCFSDRAMC_DMR_V;
-
- MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
-
- *(unsigned short *)(CFG_SDRAM_BASE0) = 0xA5A5;
- MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
- for (i=0; i < 2000; i++)
- asm(" nop");
- mbar_writeLong(MCFSDRAMC_DACR0, mbar_readLong(MCFSDRAMC_DACR0)
- | MCFSDRAMC_DACR_IMRS);
- *(unsigned int *)(CFG_SDRAM_BASE0 + 0x220) = 0xA5A5;
- size += CFG_SDRAM_SIZE * 1024 * 1024;
- #endif
- #ifdef CFG_SDRAM_BASE1
- MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE(CFG_SDRAM_BASE1)
- | MCFSDRAMC_DACR_CASL(1)
- | MCFSDRAMC_DACR_CBM(3)
- | MCFSDRAMC_DACR_PS_16;
-
- MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M
- | MCFSDRAMC_DMR_V;
-
- MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
-
- *(unsigned short *)(CFG_SDRAM_BASE1) = 0xA5A5;
- MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
- for (i=0; i < 2000; i++)
- asm(" nop");
- MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
- *(unsigned int *)(CFG_SDRAM_BASE1 + 0x220) = 0xA5A5;
- size += CFG_SDRAM_SIZE1 * 1024 * 1024;
- #endif
+ MCFSDRAMC_DCR = MCFSDRAMC_DCR_RTIM_6
+ | MCFSDRAMC_DCR_RC ((15 * CFG_CLK) >> 4);
+#ifdef CFG_SDRAM_BASE0
+
+ MCFSDRAMC_DACR0 = MCFSDRAMC_DACR_BASE (CFG_SDRAM_BASE0)
+ | MCFSDRAMC_DACR_CASL (1)
+ | MCFSDRAMC_DACR_CBM (3)
+ | MCFSDRAMC_DACR_PS_16;
+
+ MCFSDRAMC_DMR0 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
+
+ MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
+
+ *(unsigned short *) (CFG_SDRAM_BASE0) = 0xA5A5;
+ MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
+ for (i = 0; i < 2000; i++)
+ asm (" nop");
+ mbar_writeLong (MCFSDRAMC_DACR0,
+ mbar_readLong (MCFSDRAMC_DACR0) | MCFSDRAMC_DACR_IMRS);
+ *(unsigned int *) (CFG_SDRAM_BASE0 + 0x220) = 0xA5A5;
+ size += CFG_SDRAM_SIZE * 1024 * 1024;
+#endif
+#ifdef CFG_SDRAM_BASE1
+ MCFSDRAMC_DACR1 = MCFSDRAMC_DACR_BASE (CFG_SDRAM_BASE1)
+ | MCFSDRAMC_DACR_CASL (1)
+ | MCFSDRAMC_DACR_CBM (3)
+ | MCFSDRAMC_DACR_PS_16;
+
+ MCFSDRAMC_DMR1 = MCFSDRAMC_DMR_BAM_16M | MCFSDRAMC_DMR_V;
+
+ MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IP;
+
+ *(unsigned short *) (CFG_SDRAM_BASE1) = 0xA5A5;
+ MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_RE;
+
+ for (i = 0; i < 2000; i++)
+ asm (" nop");
+
+ MCFSDRAMC_DACR1 |= MCFSDRAMC_DACR_IMRS;
+ *(unsigned int *) (CFG_SDRAM_BASE1 + 0x220) = 0xA5A5;
+ size += CFG_SDRAM_SIZE1 * 1024 * 1024;
+#endif
return size;
}
dest = cmf_backdoor_address(addr);
while ((cnt>=4) && (rc == ERR_OK))
{
- data =*((volatile u32 *) src);
+ data = *((volatile u32 *) src);
*(volatile u32*) dest = data;
MCFCFM_CMD = MCFCFM_CMD_PGM;
MCFCFM_USTAT = MCFCFM_USTAT_CBEIF;
dest = addr;
while ((cnt>=2) && (rc == ERR_OK))
{
- data =*((volatile u16 *) src);
+ data = *((volatile u16 *) src);
rc=amd_write_word (info,dest,data);
src +=2;
dest +=2;
device_t kbddev ;
char *stdinname = getenv ("stdin");
- if(isa_kbd_init()==-1)
+ if(isa_kbd_init() == -1)
return -1;
memset (&kbddev, 0, sizeof(kbddev));
strcpy(kbddev.name, DEVNAME);
int val;
unsigned char status;
- val=-1;
+ val = -1;
status = kbd_read_status();
if (status & KBD_STAT_OBF) {
val = kbd_read_input();
uhci_td_t *td,*prevtd;
for(i=0;i<8;i++) {
- prevtd=&td_int[i]; /* the first previous td is the skeleton td */
+ prevtd = &td_int[i]; /* the first previous td is the skeleton td */
link=swap_32(td_int[i].link) & 0xfffffff0; /* next in chain */
td=(uhci_td_t *)link; /* assign it */
/* all interrupt TDs are finally linked to the td_int[0].
busdevfunc=pci_find_device(USB_UHCI_VEND_ID,USB_UHCI_DEV_ID,0); /* get PCI Device ID */
- if(busdevfunc==-1) {
+ if(busdevfunc == -1) {
printf("Error USB UHCI (%04X,%04X) not found\n",USB_UHCI_VEND_ID,USB_UHCI_DEV_ID);
return -1;
}
*/
int usb_lowlevel_stop(void)
{
- if(irqvec==-1)
+ if(irqvec == -1)
return 1;
irq_free_handler(irqvec);
irq_free_handler(0);
reset_hc();
- irqvec=-1;
+ irqvec = -1;
return 0;
}
+++ /dev/null
-#include "menu.h"
-
-#define SINGLE_BOX 0
-#define DOUBLE_BOX 1
-
-void video_draw_box(int style, int attr, char *title, int separate, int x, int y, int w, int h);
-void video_draw_text(int x, int y, int attr, char *text);
-void video_save_rect(int x, int y, int w, int h, void *save_area, int clearchar, int clearattr);
-void video_restore_rect(int x, int y, int w, int h, void *save_area);
-int video_rows(void);
-int video_cols(void);
-
-#define MAX_MENU_OPTIONS 200
-
-typedef struct
-{
- int used; /* flag if this entry is used */
- int entry_x; /* Character column of the menu entry */
- int entry_y; /* Character line of the entry */
- int option_x; /* Character colum of the option (entry is same) */
-} option_data_t;
-
-option_data_t odata[MAX_MENU_OPTIONS];
-
-int normal_attr = 0x0F;
-int select_attr = 0x2F;
-int disabled_attr = 0x07;
-
-menu_t *root_menu;
-
-int menu_init (menu_t *root)
-{
- char *s;
- int i;
-
- s = getenv("menu_normal");
- if (s) normal_attr = atoi(s);
-
- s = getenv("menu_select");
- if (s) select_attr = atoi(s);
-
- s = getenv("menu_disabled");
- if (s) disabled_attr = atoi(s);
-
- for (i=0; i<MAX_MENU_OPTIONS; i++) odata[i].used = 0;
-
- root_menu = root;
-}
-
-option_data_t *menu_alloc_odata(void)
-{
- int i;
- for (int i=0; i<MAX_MENU_OPTIONS; i++)
- {
- if (odata[i].used == 0) return &odata[i];
- }
- return NULL;
-}
-
-void menu_free_odata(option_data_t *odata)
-{
- odata->used = 0;
-}
-
-void menu_layout (menu_t *menu)
-{
+++ /dev/null
-#ifndef MENU_H
-#define MENU_H
-
-/* A single menu */
-typedef void (*menu_finish_callback)(struct menu_s *menu);
-
-typedef struct menu_s {
- char *name; /* Menu name */
- int num_options; /* Number of options in this menu */
- int flags; /* Various flags - see below */
- int option_align; /* Aligns options to a field width of this much characters if != 0 */
-
- struct menu_option_s **options; /* Pointer to this menu's options */
- menu_finish_callback callback; /* Called when the menu closes */
-} menu_t;
-
-/*
- * type: Type of the option (see below)
- * name: Name to display for this option
- * help: Optional help string
- * id : optional id number
- * sys : pointer for system-specific data, init to NULL and don't touch
- */
-
-#define OPTION_PREAMBLE \
- int type; \
- char *name; \
- char *help; \
- int id; \
- void *sys;
-
-/*
- * Menu option types.
- * There are a number of different layouts for menu options depending
- * on their types. Currently there are the following possibilities:
- *
- * Submenu:
- * This entry links to a new menu.
- *
- * Boolean:
- * A simple on/off toggle entry. Booleans can be either yes/no, 0/1 or on/off.
- * Optionally, this entry can enable/disable a set of other options. An example would
- * be to enable/disable on-board USB, and if enabled give access to further options like
- * irq settings, base address etc.
- *
- * Text:
- * A single line/limited number of characters text entry box. Text can be restricted
- * to a certain charset (digits/hex digits/all/custom). Result is also available as an
- * int if numeric.
- *
- * Selection:
- * One-of-many type of selection entry. User may choose on of a set of strings, which
- * maps to a specific value for the variable.
- *
- * Routine:
- * Selecting this calls an entry-specific routine. This can be used for saving contents etc.
- *
- * Custom:
- * Display and behaviour of this entry is defined by a set of callbacks.
- */
-
-#define MENU_SUBMENU_TYPE 0
-typedef struct menu_submenu_s
-{
- OPTION_PREAMBLE
-
- menu_t * submenu; /* Pointer to the submenu */
-} menu_submenu_t;
-
-#define MENU_BOOLEAN_TYPE 1
-typedef struct menu_boolean_s
-{
- OPTION_PREAMBLE
-
- char *variable; /* Name of the variable to getenv()/setenv() */
- int subtype; /* Subtype (on/off, 0/1, yes/no, enable/disable), see below */
- int mutex; /* Bit mask of options to enable/disable. Bit 0 is the option
- immediately following this one, bit 1 is the next one etc.
- bit 7 = 0 means to disable when this option is off,
- bit 7 = 1 means to disable when this option is on.
- An option is disabled when the type field's upper bit is set */
-} menu_boolean_t;
-
-/* BOOLEAN Menu flags */
-#define MENU_BOOLEAN_ONOFF 0x01
-#define MENU_BOOLEAN_01 0x02
-#define MENU_BOOLEAN_YESNO 0x03
-#define MENU_BOOLEAN_ENDIS 0x04
-#define MENU_BOOLEAN_TYPE_MASK 0x07
-
-
-#define MENU_TEXT_TYPE 2
-typedef struct menu_text_s
-{
- OPTION_PREAMBLE
-
- char *variable; /* Name of the variable to getenv()/setenv() */
- int maxchars; /* Max number of characters */
- char *charset; /* Optional charset to use */
- int flags; /* Flags - see below */
-} menu_text_t;
-
-/* TEXT entry menu flags */
-#define MENU_TEXT_NUMERIC 0x01
-#define MENU_TEXT_HEXADECIMAL 0x02
-#define MENU_TEXT_FREE 0x03
-#define MENU_TEXT_TYPE_MASK 0x07
-
-
-#define MENU_SELECTION_TYPE 3
-typedef struct menu_select_option_s {
- char *map_from; /* Map this variable contents ... */
- char *map_to; /* ... to this menu text and vice versa */
-} menu_select_option_t;
-
-typedef struct menu_select_s {
- OPTION_PREAMBLE int num_options; /* Number of mappings */
- menu_select_option_t **options;
- /* Option list array */
-} menu_select_t;
-
-
-#define MENU_ROUTINE_TYPE 4
-typedef void (*menu_routine_callback) (struct menu_routine_s *);
-
-typedef struct menu_routine_s {
- OPTION_PREAMBLE menu_routine_callback callback;
- /* routine to be called */
- void *user_data; /* User data, don't care for system */
-} menu_routine_t;
-
-
-#define MENU_CUSTOM_TYPE 5
-typedef void (*menu_custom_draw) (struct menu_custom_s *);
-typedef void (*menu_custom_key) (struct menu_custom_s *, int);
-
-typedef struct menu_custom_s {
- OPTION_PREAMBLE menu_custom_draw drawfunc;
- menu_custom_key keyfunc;
- void *user_data;
-} menu_custom_t;
-
-/*
- * The menu option superstructure
- */
-typedef struct menu_option_s {
- union {
- menu_submenu_t m_sub_menu;
- menu_boolean_t m_boolean;
- menu_text_t m_text;
- menu_select_t m_select;
- menu_routine_t m_routine;
- };
-} menu_option_t;
-
-/* Init the menu system. Returns <0 on error */
-int menu_init(menu_t *root);
-
-/* Execute a single menu. Returns <0 on error */
-int menu_do(menu_t *menu);
-
-#endif
To configure for the older Rev 2 ADS5121 type (this will not have PCI)
make ads5121_rev2_config
-
-
#include <asm/arch/hardware.h>
#include <asm/arch/emac_defs.h>
-#define MACH_TYPE_DAVINCI_EVM 901
-
DECLARE_GLOBAL_DATA_PTR;
-extern void i2c_init(int speed, int slaveaddr);
extern void timer_init(void);
extern int eth_hw_init(void);
-extern phy_t phy;
/* Works on Always On power domain only (no PD argument) */
}
}
- if (!eth_hw_init()) {
+ if (!eth_hw_init())
printf("ethernet init failed!\n");
- } else {
- printf("ETH PHY : %s\n", phy.name);
- }
i2c_read (0x39, 0x00, 1, (u_int8_t *)&i, 1);
#include <asm/arch/hardware.h>
#include <asm/arch/emac_defs.h>
-#define MACH_TYPE_SCHMOOGIE 1255
-
DECLARE_GLOBAL_DATA_PTR;
-extern void i2c_init(int speed, int slaveaddr);
extern void timer_init(void);
extern int eth_hw_init(void);
-extern phy_t phy;
/* Works on Always On power domain only (no PD argument) */
forceenv("serial#", (char *)&tmp[0]);
}
- if (!eth_hw_init()) {
+ if (!eth_hw_init())
printf("ethernet init failed!\n");
- } else {
- printf("ETH PHY : %s\n", phy.name);
- }
return(0);
}
extern void timer_init(void);
extern int eth_hw_init(void);
-extern phy_t phy;
/* Works on Always On power domain only (no PD argument) */
}
}
- if (!eth_hw_init()) {
+ if (!eth_hw_init())
printf("Ethernet init failed\n");
- } else {
- printf("ETH PHY: %s\n", phy.name);
- }
/* On this platform, U-Boot is copied in RAM by the UBL,
* so we are always in the relocated state. */
#include <asm/arch/hardware.h>
#include <asm/arch/emac_defs.h>
-#define MACH_TYPE_SONATA 1254
-
DECLARE_GLOBAL_DATA_PTR;
-extern void i2c_init(int speed, int slaveaddr);
extern void timer_init(void);
extern int eth_hw_init(void);
-extern phy_t phy;
/* Works on Always On power domain only (no PD argument) */
}
}
- if (!eth_hw_init()) {
+ if (!eth_hw_init())
printf("ethernet init failed!\n");
- } else {
- printf("ETH PHY : %s\n", phy.name);
- }
return(0);
}
#include <net.h>
#include "srom.h"
-extern int eepro100_write_eeprom (struct eth_device* dev,
- int location, int addr_len, unsigned short data);
+extern int eepro100_write_eeprom (struct eth_device *dev,
+ int location, int addr_len,
+ unsigned short data);
/*----------------------------------------------------------------------------*/
unsigned short eepro100_srom_checksum (unsigned short *sromdata)
{
- unsigned short sum = 0;
- unsigned int i;
-
- for (i = 0; i < (EE_SIZE-1); i++)
- {
- sum += sromdata[i];
- }
- return (EE_CHECKSUM - sum);
+ unsigned short sum = 0;
+ unsigned int i;
+
+ for (i = 0; i < (EE_SIZE - 1); i++) {
+ sum += sromdata[i];
+ }
+ return (EE_CHECKSUM - sum);
}
/*----------------------------------------------------------------------------*/
int eepro100_srom_store (unsigned short *source)
{
- int count;
- struct eth_device onboard_dev;
-
- /* get onboard network iobase */
- pci_read_config_dword(PCI_BDF(0,0x10,0), PCI_BASE_ADDRESS_0,
- (unsigned int *)&onboard_dev.iobase);
- onboard_dev.iobase &= ~0xf;
-
- source[63] = eepro100_srom_checksum (source);
-
- for (count=0; count < EE_SIZE; count++)
- {
- if ( eepro100_write_eeprom ((struct eth_device*)&onboard_dev,
- count, EE_ADDR_BITS, SROM_SHORT(source)) == -1 )
- return -1;
- source++;
- }
- return 0;
+ int count;
+ struct eth_device onboard_dev;
+
+ /* get onboard network iobase */
+ pci_read_config_dword (PCI_BDF (0, 0x10, 0), PCI_BASE_ADDRESS_0,
+ (unsigned int *) &onboard_dev.iobase);
+ onboard_dev.iobase &= ~0xf;
+
+ source[63] = eepro100_srom_checksum (source);
+
+ for (count = 0; count < EE_SIZE; count++) {
+ if (eepro100_write_eeprom ((struct eth_device *) &onboard_dev,
+ count, EE_ADDR_BITS,
+ SROM_SHORT (source)) == -1) {
+ return -1;
+ }
+ source++;
+ }
+ return 0;
}
/*----------------------------------------------------------------------------*/
#ifdef EEPRO100_SROM_CHECK
-extern int read_eeprom (struct eth_device* dev, int location, int addr_len);
+extern int read_eeprom (struct eth_device *dev, int location, int addr_len);
void eepro100_srom_load (unsigned short *destination)
{
- int count;
- struct eth_device onboard_dev;
+ int count;
+ struct eth_device onboard_dev;
+
#ifdef DEBUG
- int lr = 0;
- printf ("eepro100_srom_download:\n");
+ int lr = 0;
+
+ printf ("eepro100_srom_download:\n");
#endif
- /* get onboard network iobase */
- pci_read_config_dword(PCI_BDF(0,0x10,0), PCI_BASE_ADDRESS_0,
- &onboard_dev.iobase);
- onboard_dev.iobase &= ~0xf;
+ /* get onboard network iobase */
+ pci_read_config_dword (PCI_BDF (0, 0x10, 0), PCI_BASE_ADDRESS_0,
+ &onboard_dev.iobase);
+ onboard_dev.iobase &= ~0xf;
- memset (destination, 0x65, 128);
+ memset (destination, 0x65, 128);
- for (count=0; count < 0x40; count++)
- {
- *destination++ = read_eeprom (struct eth_device*)&onboard_dev,
- count, EE_ADDR_BITS);
+ for (count = 0; count < 0x40; count++) {
+ *destination++ = read_eeprom ((struct eth_device *) &onboard_dev,
+ count, EE_ADDR_BITS);
#ifdef DEBUG
- printf ("%04x ", *(destination - 1));
- if (lr++ == 7)
- {
- printf("\n");
- lr = 0;
- }
+ printf ("%04x ", *(destination - 1));
+ if (lr++ == 7) {
+ printf ("\n");
+ lr = 0;
+ }
#endif
- }
+ }
}
#endif /* EEPRO100_SROM_CHECK */
for (cnt = STARTVAL/sizeof(long); cnt < maxsize/sizeof(long); cnt <<= 1) {
addr = base + cnt; /* pointer arith! */
- save1=*addr; /* save contents of addr */
- save2=*b; /* save contents of base */
+ save1 = *addr; /* save contents of addr */
+ save2 = *b; /* save contents of base */
*addr=cnt; /* write cnt to addr */
*b=0; /* put null at base */
int eth_len=0;
char *eth_data;
- eth0_rx_desc_single *rx=&p->eth_rx_desc[(p->rdn)];
+ eth0_rx_desc_single *rx = &p->eth_rx_desc[(p->rdn)];
INVALIDATE_DCACHE((unsigned int)rx,(unsigned int)(rx+1));
#ifdef DEBUG
unsigned int old_command_stat,old_psr;
#endif
- eth0_tx_desc_single *tx=&dev->eth_tx_desc[dev->tdn];
+ eth0_tx_desc_single *tx = &dev->eth_tx_desc[dev->tdn];
/* wait for tx to be ready */
INVALIDATE_DCACHE((unsigned int)tx,(unsigned int)(tx+1));
int
mpsc_test_char(void)
{
- volatile unsigned int *p=&rx_desc_base[rx_desc_index*8];
+ volatile unsigned int *p = &rx_desc_base[rx_desc_index*8];
INVALIDATE_DCACHE(&p[1], &p[2]);
/*
- * Copyright 2006 Freescale Semiconductor
+ * Copyright 2006, 2008 Freescale Semiconductor
* York Sun (yorksun@freescale.com)
* Haiying Wang (haiying.wang@freescale.com)
+ * Timur Tabi (timur@freescale.com)
*
* See file CREDITS for list of people who contributed to this
* project.
#include <i2c.h>
#include <linux/ctype.h>
-typedef struct {
- u8 id[4]; /* 0x0000 - 0x0003 EEPROM Tag */
- u8 sn[12]; /* 0x0004 - 0x000F Serial Number */
- u8 errata[5]; /* 0x0010 - 0x0014 Errata Level */
- u8 date[6]; /* 0x0015 - 0x001a Build Date */
- u8 res_0; /* 0x001b Reserved */
- u8 version[4]; /* 0x001c - 0x001f Version */
- u8 tempcal[8]; /* 0x0020 - 0x0027 Temperature Calibration Factors*/
- u8 tempcalsys[2]; /* 0x0028 - 0x0029 System Temperature Calibration Factors*/
- u8 res_1[22]; /* 0x0020 - 0x003f Reserved */
- u8 mac_size; /* 0x0040 Mac table size */
- u8 mac_flag; /* 0x0041 Mac table flags */
- u8 mac[8][6]; /* 0x0042 - 0x0071 Mac addresses */
- u32 crc; /* 0x0072 crc32 checksum */
-} EEPROM_data;
-
-static EEPROM_data mac_data;
-
-int mac_show(void)
+#include "../common/eeprom.h"
+
+#if !defined(CFG_I2C_EEPROM_CCID) && !defined(CFG_I2C_EEPROM_NXID)
+#error "Please define either CFG_I2C_EEPROM_CCID or CFG_I2C_EEPROM_NXID"
+#endif
+
+/**
+ * static eeprom: EEPROM layout for CCID or NXID formats
+ *
+ * See application note AN3638 for details.
+ */
+static struct __attribute__ ((__packed__)) eeprom {
+#ifdef CFG_I2C_EEPROM_CCID
+ u8 id[4]; /* 0x00 - 0x03 EEPROM Tag 'CCID' */
+ u8 major; /* 0x04 Board revision, major */
+ u8 minor; /* 0x05 Board revision, minor */
+ u8 sn[10]; /* 0x06 - 0x0F Serial Number*/
+ u8 errata[2]; /* 0x10 - 0x11 Errata Level */
+ u8 date[6]; /* 0x12 - 0x17 Build Date */
+ u8 res_0[40]; /* 0x18 - 0x3f Reserved */
+ u8 mac_count; /* 0x40 Number of MAC addresses */
+ u8 mac_flag; /* 0x41 MAC table flags */
+ u8 mac[8][6]; /* 0x42 - 0x71 MAC addresses */
+ u32 crc; /* 0x72 CRC32 checksum */
+#endif
+#ifdef CFG_I2C_EEPROM_NXID
+ u8 id[4]; /* 0x00 - 0x03 EEPROM Tag 'NXID' */
+ u8 sn[12]; /* 0x04 - 0x0F Serial Number */
+ u8 errata[5]; /* 0x10 - 0x14 Errata Level */
+ u8 date[6]; /* 0x15 - 0x1a Build Date */
+ u8 res_0; /* 0x1b Reserved */
+ u32 version; /* 0x1c - 0x1f NXID Version */
+ u8 tempcal[8]; /* 0x20 - 0x27 Temperature Calibration Factors */
+ u8 tempcalsys[2]; /* 0x28 - 0x29 System Temperature Calibration Factors */
+ u8 tempcalflags; /* 0x2a Temperature Calibration Flags */
+ u8 res_1[21]; /* 0x2b - 0x3f Reserved */
+ u8 mac_count; /* 0x40 Number of MAC addresses */
+ u8 mac_flag; /* 0x41 MAC table flags */
+ u8 mac[8][6]; /* 0x42 - 0x71 MAC addresses */
+ u32 crc; /* 0x72 CRC32 checksum */
+#endif
+} e;
+
+/* Set to 1 if we've read EEPROM into memory */
+static int has_been_read = 0;
+
+#ifdef CFG_I2C_EEPROM_NXID
+/* Is this a valid NXID EEPROM? */
+#define is_valid (*((u32 *)e.id) == (('N' << 24) | ('X' << 16) | ('I' << 8) | 'D'))
+#endif
+
+#ifdef CFG_I2C_EEPROM_CCID
+/* Is this a valid CCID EEPROM? */
+#define is_valid (*((u32 *)e.id) == (('C' << 24) | ('C' << 16) | ('I' << 8) | 'D'))
+#endif
+
+/**
+ * show_eeprom - display the contents of the EEPROM
+ */
+static void show_eeprom(void)
{
int i;
- u8 mac_size;
- unsigned char ethaddr[8][18];
- unsigned char enetvar[32];
-
- /* Show EEPROM tagID,
- * always the four characters 'NXID'.
- */
- printf("ID ");
- for (i = 0; i < 4; i++)
- printf("%c", mac_data.id[i]);
- printf("\n");
-
- /* Show Serial number,
- * 0 to 11 charaters of errata information.
- */
- printf("SN ");
- for (i = 0; i < 12; i++)
- printf("%c", mac_data.sn[i]);
- printf("\n");
-
- /* Show Errata Level,
- * 0 to 4 characters of errata information.
- */
- printf("Errata ");
- for (i = 0; i < 5; i++)
- printf("%c", mac_data.errata[i]);
- printf("\n");
-
- /* Show Build Date,
- * BCD date values, as YYMMDDhhmmss.
- */
- printf("Date 20%02x/%02x/%02x %02x:%02x:%02x\n",
- mac_data.date[0],
- mac_data.date[1],
- mac_data.date[2],
- mac_data.date[3],
- mac_data.date[4],
- mac_data.date[5]);
-
- /* Show MAC table size,
- * Value from 0 to 7 indicating how many MAC
- * addresses are stored in the system EEPROM.
- */
- if((mac_data.mac_size > 0) && (mac_data.mac_size <= 8))
- mac_size = mac_data.mac_size;
- else
- mac_size = 8; /* Set the max size */
- printf("MACSIZE %x\n", mac_size);
-
- /* Show Mac addresses */
- for (i = 0; i < mac_size; i++) {
- sprintf((char *)ethaddr[i],
- "%02x:%02x:%02x:%02x:%02x:%02x",
- mac_data.mac[i][0],
- mac_data.mac[i][1],
- mac_data.mac[i][2],
- mac_data.mac[i][3],
- mac_data.mac[i][4],
- mac_data.mac[i][5]);
- printf("MAC %d %s\n", i, ethaddr[i]);
-
- sprintf((char *)enetvar,
- i ? "eth%daddr" : "ethaddr", i);
- setenv((char *)enetvar, (char *)ethaddr[i]);
+ unsigned int crc;
+
+ /* EEPROM tag ID, either CCID or NXID */
+#ifdef CFG_I2C_EEPROM_NXID
+ printf("ID: %c%c%c%c v%u\n", e.id[0], e.id[1], e.id[2], e.id[3],
+ be32_to_cpu(e.version));
+#else
+ printf("ID: %c%c%c%c\n", e.id[0], e.id[1], e.id[2], e.id[3]);
+#endif
+
+ /* Serial number */
+ printf("SN: %s\n", e.sn);
+
+ /* Errata level. */
+#ifdef CFG_I2C_EEPROM_NXID
+ printf("Errata: %s\n", e.errata);
+#else
+ printf("Errata: %c%c\n",
+ e.errata[0] ? e.errata[0] : '.',
+ e.errata[1] ? e.errata[1] : '.');
+#endif
+
+ /* Build date, BCD date values, as YYMMDDhhmmss */
+ printf("Build date: 20%02x/%02x/%02x %02x:%02x:%02x %s\n",
+ e.date[0], e.date[1], e.date[2],
+ e.date[3] & 0x7F, e.date[4], e.date[5],
+ e.date[3] & 0x80 ? "PM" : "");
+
+ /* Show MAC addresses */
+ for (i = 0; i < min(e.mac_count, 8); i++) {
+ u8 *p = e.mac[i];
+ printf("Eth%u: %02x:%02x:%02x:%02x:%02x:%02x\n", i,
+ p[0], p[1], p[2], p[3], p[4], p[5]);
}
- return 0;
+ crc = crc32(0, (void *)&e, sizeof(e) - 4);
+
+ if (crc == be32_to_cpu(e.crc))
+ printf("CRC: %08x\n", be32_to_cpu(e.crc));
+ else
+ printf("CRC: %08x (should be %08x)\n",
+ be32_to_cpu(e.crc), crc);
+
+#ifdef DEBUG
+ printf("EEPROM dump: (0x%x bytes)\n", sizeof(e));
+ for (i = 0; i < sizeof(e); i++) {
+ if ((i % 16) == 0)
+ printf("%02X: ", i);
+ printf("%02X ", ((u8 *)&e)[i]);
+ if (((i % 16) == 15) || (i == sizeof(e) - 1))
+ printf("\n");
+ }
+#endif
}
-int mac_read(void)
+/**
+ * read_eeprom - read the EEPROM into memory
+ */
+static int read_eeprom(void)
{
- int ret, length;
- unsigned int crc = 0;
- unsigned char dev = ID_EEPROM_ADDR, *data;
+ int ret;
+#ifdef CFG_EEPROM_BUS_NUM
+ unsigned int bus;
+#endif
- length = sizeof(EEPROM_data);
- ret = i2c_read(dev, 0, 1, (unsigned char *)(&mac_data), length);
- if (ret) {
- printf("Read failed.\n");
- return -1;
- }
+ if (has_been_read)
+ return 0;
- data = (unsigned char *)(&mac_data);
- printf("Check CRC on reading ...");
- crc = crc32(crc, data, length - 4);
- if (crc != mac_data.crc) {
- printf("CRC checksum is invalid, in EEPROM CRC is %x, calculated CRC is %x\n",
- mac_data.crc, crc);
- return -1;
- } else {
- printf("CRC OK\n");
- mac_show();
- }
- return 0;
+#ifdef CFG_EEPROM_BUS_NUM
+ bus = i2c_get_bus_num();
+ i2c_set_bus_num(CFG_EEPROM_BUS_NUM);
+#endif
+
+ ret = i2c_read(CFG_I2C_EEPROM_ADDR, 0, CFG_I2C_EEPROM_ADDR_LEN,
+ (void *)&e, sizeof(e));
+
+#ifdef CFG_EEPROM_BUS_NUM
+ i2c_set_bus_num(bus);
+#endif
+
+#ifdef DEBUG
+ show_eeprom();
+#endif
+
+ has_been_read = (ret == 0) ? 1 : 0;
+
+ return ret;
}
-int mac_prog(void)
+/**
+ * prog_eeprom - write the EEPROM from memory
+ */
+static int prog_eeprom(void)
{
int ret, i, length;
- unsigned int crc = 0;
- unsigned char dev = ID_EEPROM_ADDR, *ptr;
- unsigned char *eeprom_data = (unsigned char *)(&mac_data);
-
- mac_data.res_0 = 0;
- memset((void *)mac_data.res_1, 0, sizeof(mac_data.res_1));
-
- length = sizeof(EEPROM_data);
- crc = crc32(crc, eeprom_data, length - 4);
- mac_data.crc = crc;
- for (i = 0, ptr = eeprom_data; i < length; i += 8, ptr += 8) {
- ret = i2c_write(dev, i, 1, ptr, min((length - i),8));
- udelay(5000); /* 5ms write cycle timing */
+ unsigned int crc;
+ void *p;
+#ifdef CFG_EEPROM_BUS_NUM
+ unsigned int bus;
+#endif
+
+ /* Set the reserved values to 0xFF */
+#ifdef CFG_I2C_EEPROM_NXID
+ e.res_0 = 0xFF;
+ memset(e.res_1, 0xFF, sizeof(e.res_1));
+#else
+ memset(e.res_0, 0xFF, sizeof(e.res_0));
+#endif
+
+ length = sizeof(e);
+ crc = crc32(0, (void *)&e, length - 4);
+ e.crc = cpu_to_be32(crc);
+
+#ifdef CFG_EEPROM_BUS_NUM
+ bus = i2c_get_bus_num();
+ i2c_set_bus_num(CFG_EEPROM_BUS_NUM);
+#endif
+
+ for (i = 0, p = &e; i < length; i += 8, p += 8) {
+ ret = i2c_write(CFG_I2C_EEPROM_ADDR, i, CFG_I2C_EEPROM_ADDR_LEN,
+ p, min((length - i), 8));
if (ret)
break;
+ udelay(5000); /* 5ms write cycle timing */
}
+
+#ifdef CFG_EEPROM_BUS_NUM
+ i2c_set_bus_num(bus);
+#endif
+
if (ret) {
printf("Programming failed.\n");
return -1;
- } else {
- printf("Programming %d bytes. Reading back ...\n", length);
- mac_read();
}
+
+ printf("Programming passed.\n");
return 0;
}
-int do_mac(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+/**
+ * h2i - converts hex character into a number
+ *
+ * This function takes a hexadecimal character (e.g. '7' or 'C') and returns
+ * the integer equivalent.
+ */
+static inline u8 h2i(char p)
+{
+ if ((p >= '0') && (p <= '9'))
+ return p - '0';
+
+ if ((p >= 'A') && (p <= 'F'))
+ return (p - 'A') + 10;
+
+ if ((p >= 'a') && (p <= 'f'))
+ return (p - 'a') + 10;
+
+ return 0;
+}
+
+/**
+ * set_date - stores the build date into the EEPROM
+ *
+ * This function takes a pointer to a string in the format "YYMMDDhhmmss"
+ * (2-digit year, 2-digit month, etc), converts it to a 6-byte BCD string,
+ * and stores it in the build date field of the EEPROM local copy.
+ */
+static void set_date(const char *string)
+{
+ unsigned int i;
+
+ if (strlen(string) != 12) {
+ printf("Usage: mac date YYMMDDhhmmss\n");
+ return;
+ }
+
+ for (i = 0; i < 6; i++)
+ e.date[i] = h2i(string[2 * i]) << 4 | h2i(string[2 * i + 1]);
+}
+
+/**
+ * set_mac_address - stores a MAC address into the EEPROM
+ *
+ * This function takes a pointer to MAC address string
+ * (i.e."XX:XX:XX:XX:XX:XX", where "XX" is a two-digit hex number) and
+ * stores it in one of the MAC address fields of the EEPROM local copy.
+ */
+static void set_mac_address(unsigned int index, const char *string)
+{
+ char *p = (char *) string;
+ unsigned int i;
+
+ if (!string) {
+ printf("Usage: mac <n> XX:XX:XX:XX:XX:XX\n");
+ return;
+ }
+
+ for (i = 0; *p && (i < 6); i++) {
+ e.mac[index][i] = simple_strtoul(p, &p, 16);
+ if (*p == ':')
+ p++;
+ }
+}
+
+int do_mac(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int i;
- char cmd = 's';
- unsigned long long mac_val;
+ char cmd;
- if (i2c_probe(ID_EEPROM_ADDR) != 0)
- return -1;
+ if (argc == 1) {
+ show_eeprom();
+ return 0;
+ }
+
+ cmd = argv[1][0];
- if (argc > 1) {
- cmd = argv[1][0];
+ if (cmd == 'r') {
+ read_eeprom();
+ return 0;
+ }
+
+ if ((cmd == 'i') && (argc > 2)) {
+ for (i = 0; i < 4; i++)
+ e.id[i] = argv[2][i];
+ return 0;
+ }
+
+ if (!is_valid) {
+ printf("Please read the EEPROM ('r') and/or set the ID ('i') first.\n");
+ return 0;
+ }
+
+ if (argc == 2) {
switch (cmd) {
- case 'r': /* display */
- mac_read();
- break;
case 's': /* save */
- mac_prog();
- break;
- case 'i': /* id */
- for (i = 0; i < 4; i++) {
- mac_data.id[i] = argv[2][i];
- }
+ prog_eeprom();
break;
- case 'n': /* serial number */
- for (i = 0; i < 12; i++) {
- mac_data.sn[i] = argv[2][i];
- }
- break;
- case 'e': /* errata */
- for (i = 0; i < 5; i++) {
- mac_data.errata[i] = argv[2][i];
- }
- break;
- case 'd': /* date */
- mac_val = simple_strtoull(argv[2], NULL, 16);
- for (i = 0; i < 6; i++) {
- mac_data.date[i] = (mac_val >> (40 - 8 * i));
- }
- break;
- case 'p': /* mac table size */
- mac_data.mac_size =
- (unsigned char)simple_strtoul(argv[2], NULL, 16);
- break;
- case '0': /* mac 0 */
- case '1': /* mac 1 */
- case '2': /* mac 2 */
- case '3': /* mac 3 */
- case '4': /* mac 4 */
- case '5': /* mac 5 */
- case '6': /* mac 6 */
- case '7': /* mac 7 */
- mac_val = simple_strtoull(argv[2], NULL, 16);
- for (i = 0; i < 6; i++) {
- mac_data.mac[cmd - '0'][i] =
- *((unsigned char *)
- (((unsigned int)(&mac_val)) + i + 2));
- }
- break;
- case 'h': /* help */
default:
printf("Usage:\n%s\n", cmdtp->usage);
break;
}
- } else {
- mac_show();
+
+ return 0;
}
+
+ /* We know we have at least one parameter */
+
+ switch (cmd) {
+ case 'n': /* serial number */
+ memset(e.sn, 0, sizeof(e.sn));
+ strncpy((char *)e.sn, argv[2], sizeof(e.sn) - 1);
+ break;
+ case 'e': /* errata */
+#ifdef CFG_I2C_EEPROM_NXID
+ memset(e.errata, 0, 5);
+ strncpy((char *)e.errata, argv[2], 4);
+#else
+ e.errata[0] = argv[2][0];
+ e.errata[1] = argv[2][1];
+#endif
+ break;
+ case 'd': /* date BCD format YYMMDDhhmmss */
+ set_date(argv[2]);
+ break;
+ case 'p': /* MAC table size */
+ e.mac_count = simple_strtoul(argv[2], NULL, 16);
+ break;
+ case '0' ... '7': /* "mac 0" through "mac 7" */
+ set_mac_address(cmd - '0', argv[2]);
+ break;
+ case 'h': /* help */
+ default:
+ printf("Usage:\n%s\n", cmdtp->usage);
+ break;
+ }
+
return 0;
}
+/**
+ * mac_read_from_eeprom - read the MAC addresses from EEPROM
+ *
+ * This function reads the MAC addresses from EEPROM and sets the
+ * appropriate environment variables for each one read.
+ *
+ * The environment variables are only set if they haven't been set already.
+ * This ensures that any user-saved variables are never overwritten.
+ *
+ * This function must be called after relocation.
+ */
int mac_read_from_eeprom(void)
{
- int length, i;
- unsigned char dev = ID_EEPROM_ADDR;
- unsigned char *data;
- unsigned char ethaddr[4][18];
- unsigned char enetvar[32];
- unsigned int crc = 0;
-
- length = sizeof(EEPROM_data);
- if (i2c_read(dev, 0, 1, (unsigned char *)(&mac_data), length)) {
+ unsigned int i;
+
+ if (read_eeprom()) {
printf("Read failed.\n");
return -1;
}
- data = (unsigned char *)(&mac_data);
- crc = crc32(crc, data, length - 4);
- if (crc != mac_data.crc) {
+ if (!is_valid) {
+ printf("Invalid ID (%02x %02x %02x %02x)\n", e.id[0], e.id[1], e.id[2], e.id[3]);
return -1;
- } else {
- for (i = 0; i < 4; i++) {
- if (memcmp(&mac_data.mac[i], "\0\0\0\0\0\0", 6)) {
- sprintf((char *)ethaddr[i],
- "%02x:%02x:%02x:%02x:%02x:%02x",
- mac_data.mac[i][0],
- mac_data.mac[i][1],
- mac_data.mac[i][2],
- mac_data.mac[i][3],
- mac_data.mac[i][4],
- mac_data.mac[i][5]);
- sprintf((char *)enetvar,
- i ? "eth%daddr" : "ethaddr",
- i);
- setenv((char *)enetvar, (char *)ethaddr[i]);
- }
+ }
+
+ if (be32_to_cpu(e.crc) != 0xFFFFFFFF) {
+ u32 crc = crc32(0, (void *)&e, sizeof(e) - 4);
+
+ if (crc != be32_to_cpu(e.crc)) {
+ printf("CRC mismatch (%08x != %08x).\n", crc,
+ be32_to_cpu(e.crc));
+ return -1;
+ }
+ }
+
+ for (i = 0; i < min(4, e.mac_count); i++) {
+ if (memcmp(&e.mac[i], "\0\0\0\0\0\0", 6) &&
+ memcmp(&e.mac[i], "\xFF\xFF\xFF\xFF\xFF\xFF", 6)) {
+ char ethaddr[18];
+ char enetvar[9];
+
+ sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X",
+ e.mac[i][0],
+ e.mac[i][1],
+ e.mac[i][2],
+ e.mac[i][3],
+ e.mac[i][4],
+ e.mac[i][5]);
+ sprintf(enetvar, i ? "eth%daddr" : "ethaddr", i);
+ /* Only initialize environment variables that are blank
+ * (i.e. have not yet been set)
+ */
+ if (!getenv(enetvar))
+ setenv(enetvar, ethaddr);
}
}
+
return 0;
}
+
+#ifdef CFG_I2C_EEPROM_CCID
+
+/**
+ * get_cpu_board_revision - get the CPU board revision on 85xx boards
+ *
+ * Read the EEPROM to determine the board revision.
+ *
+ * This function is called before relocation, so we need to read a private
+ * copy of the EEPROM into a local variable on the stack.
+ *
+ * Also, we assume that CFG_EEPROM_BUS_NUM == CFG_SPD_BUS_NUM. The global
+ * variable i2c_bus_num must be compile-time initialized to CFG_SPD_BUS_NUM,
+ * so that the SPD code will work. This means that all pre-relocation I2C
+ * operations can only occur on the CFG_SPD_BUS_NUM bus. So if
+ * CFG_EEPROM_BUS_NUM != CFG_SPD_BUS_NUM, then we can't read the EEPROM when
+ * this function is called. Oh well.
+ */
+unsigned int get_cpu_board_revision(void)
+{
+ struct board_eeprom {
+ u32 id; /* 0x00 - 0x03 EEPROM Tag 'CCID' */
+ u8 major; /* 0x04 Board revision, major */
+ u8 minor; /* 0x05 Board revision, minor */
+ } be;
+
+ i2c_read(CFG_I2C_EEPROM_ADDR, 0, CFG_I2C_EEPROM_ADDR_LEN,
+ (void *)&be, sizeof(be));
+
+ if (be.id != (('C' << 24) | ('C' << 16) | ('I' << 8) | 'D'))
+ return MPC85XX_CPU_BOARD_REV(0, 0);
+
+ if ((be.major == 0xff) && (be.minor == 0xff))
+ return MPC85XX_CPU_BOARD_REV(0, 0);
+
+ return MPC85XX_CPU_BOARD_REV(e.major, e.minor);
+}
+#endif
struct law_entry law_table[] = {
SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI),
SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI),
- SET_LAW(CFG_LBC_CACHE_BASE, LAWAR_SIZE_256M, LAW_TRGT_IF_LBC),
+ SET_LAW(CFG_LBC_NONCACHE_BASE, LAWAR_SIZE_128M, LAW_TRGT_IF_LBC),
SET_LAW(CFG_PCIE1_MEM_PHYS, LAWAR_SIZE_256M, LAW_TRGT_IF_PCIE_1),
SET_LAW(CFG_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1),
SET_LAW(CFG_PCIE2_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_2),
if ((uint)&gur->porpllsr != 0xe00e0000) {
printf("immap size error %lx\n",(ulong)&gur->porpllsr);
}
- printf ("Board: MPC8544DS\n");
+ printf ("Board: MPC8544DS, System ID: 0x%02x, "
+ "System Version: 0x%02x, FPGA Version: 0x%02x\n",
+ in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
+ in8(PIXIS_BASE + PIXIS_PVER));
lbc->ltesr = 0xffffffff; /* Clear LBC error interrupts */
lbc->lteir = 0xffffffff; /* Enable LBC error interrupts */
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 4, BOOKE_PAGESZ_64M, 1),
-#ifdef CFG_LBC_CACHE_BASE
/*
- * TLB 5: 64M Cacheable, non-guarded
- */
- SET_TLB_ENTRY(1, CFG_LBC_CACHE_BASE, CFG_LBC_CACHE_BASE,
- MAS3_SX|MAS3_SW|MAS3_SR, 0,
- 0, 5, BOOKE_PAGESZ_64M, 1),
-#endif
- /*
- * TLB 6: 64M Non-cacheable, guarded
+ * TLB 5: 64M Non-cacheable, guarded
* 0xf8000000 64M PIXIS 0xF8000000 - 0xFBFFFFFF
*/
SET_TLB_ENTRY(1, CFG_LBC_NONCACHE_BASE, CFG_LBC_NONCACHE_BASE,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
- 0, 6, BOOKE_PAGESZ_64M, 1),
+ 0, 5, BOOKE_PAGESZ_64M, 1),
};
int num_tlb_entries = ARRAY_SIZE(tlb_table);
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
lib_generic/zlib.o (.text)
+ drivers/bios_emulator/atibios.o (.text)
*(.text)
*(.fixup)
*(.got1)
--- /dev/null
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# (C) Copyright 2004-2008
+# Matrix-Vision GmbH, info@matrix-vision.de
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o fpga.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
--- /dev/null
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+ifndef TEXT_BASE
+TEXT_BASE = 0xFF800000
+endif
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
--- /dev/null
+/*
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ * Keith Outwater, keith_outwater@mvis.com.
+ *
+ * (C) Copyright 2008
+ * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <ACEX1K.h>
+#include <command.h>
+#include "fpga.h"
+#include "mvbc_p.h"
+
+#ifdef FPGA_DEBUG
+#define fpga_debug(fmt, args...) printf("%s: "fmt, __func__, ##args)
+#else
+#define fpga_debug(fmt, args...)
+#endif
+
+Altera_CYC2_Passive_Serial_fns altera_fns = {
+ fpga_null_fn,
+ fpga_config_fn,
+ fpga_status_fn,
+ fpga_done_fn,
+ fpga_wr_fn,
+ fpga_null_fn,
+ fpga_null_fn,
+ 0
+};
+
+Altera_desc cyclone2 = {
+ Altera_CYC2,
+ passive_serial,
+ Altera_EP2C8_SIZE,
+ (void *) &altera_fns,
+ NULL,
+ 0
+};
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int mvbc_p_init_fpga(void)
+{
+ fpga_debug("Initialize FPGA interface (reloc 0x%.8lx)\n",
+ gd->reloc_off);
+ fpga_init(gd->reloc_off);
+ fpga_add(fpga_altera, &cyclone2);
+ fpga_config_fn(0, 1, 0);
+ udelay(60);
+
+ return 1;
+}
+
+int fpga_null_fn(int cookie)
+{
+ return 0;
+}
+
+int fpga_config_fn(int assert, int flush, int cookie)
+{
+ struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
+ u32 dvo = gpio->simple_dvo;
+
+ fpga_debug("SET config : %s\n", assert ? "low" : "high");
+ if (assert)
+ dvo |= FPGA_CONFIG;
+ else
+ dvo &= ~FPGA_CONFIG;
+
+ if (flush)
+ gpio->simple_dvo = dvo;
+
+ return assert;
+}
+
+int fpga_done_fn(int cookie)
+{
+ struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
+ int result = 0;
+
+ udelay(10);
+ fpga_debug("CONF_DONE check ... ");
+ if (gpio->simple_ival & FPGA_CONF_DONE) {
+ fpga_debug("high\n");
+ result = 1;
+ } else
+ fpga_debug("low\n");
+
+ return result;
+}
+
+int fpga_status_fn(int cookie)
+{
+ struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
+ int result = 0;
+
+ fpga_debug("STATUS check ... ");
+ if (gpio->sint_ival & FPGA_STATUS) {
+ fpga_debug("high\n");
+ result = 1;
+ } else
+ fpga_debug("low\n");
+
+ return result;
+}
+
+int fpga_clk_fn(int assert_clk, int flush, int cookie)
+{
+ struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
+ u32 dvo = gpio->simple_dvo;
+
+ fpga_debug("CLOCK %s\n", assert_clk ? "high" : "low");
+ if (assert_clk)
+ dvo |= FPGA_CCLK;
+ else
+ dvo &= ~FPGA_CCLK;
+
+ if (flush)
+ gpio->simple_dvo = dvo;
+
+ return assert_clk;
+}
+
+static inline int _write_fpga(u8 val)
+{
+ int i;
+ struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
+ u32 dvo = gpio->simple_dvo;
+
+ for (i=0; i<8; i++) {
+ dvo &= ~FPGA_CCLK;
+ gpio->simple_dvo = dvo;
+ dvo &= ~FPGA_DIN;
+ if (val & 1)
+ dvo |= FPGA_DIN;
+ gpio->simple_dvo = dvo;
+ dvo |= FPGA_CCLK;
+ gpio->simple_dvo = dvo;
+ val >>= 1;
+ }
+
+ return 0;
+}
+
+int fpga_wr_fn(void *buf, size_t len, int flush, int cookie)
+{
+ unsigned char *data = (unsigned char *) buf;
+ int i;
+
+ fpga_debug("fpga_wr: buf %p / size %d\n", buf, len);
+ for (i = 0; i < len; i++)
+ _write_fpga(data[i]);
+ fpga_debug("\n");
+
+ return FPGA_SUCCESS;
+}
--- /dev/null
+/*
+ * (C) Copyright 2002
+ * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
+ * Keith Outwater, keith_outwater@mvis.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+extern int mvbc_p_init_fpga(void);
+
+extern int fpga_pgm_fn(int assert_pgm, int flush, int cookie);
+extern int fpga_status_fn(int cookie);
+extern int fpga_config_fn(int assert, int flush, int cookie);
+extern int fpga_done_fn(int cookie);
+extern int fpga_clk_fn(int assert_clk, int flush, int cookie);
+extern int fpga_wr_fn(void *buf, size_t len, int flush, int cookie);
+extern int fpga_null_fn(int cookie);
--- /dev/null
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004
+ * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
+ *
+ * (C) Copyright 2005-2007
+ * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc5xxx.h>
+#include <malloc.h>
+#include <pci.h>
+#include <i2c.h>
+#include <environment.h>
+#include <fdt_support.h>
+#include <asm/io.h>
+#include "fpga.h"
+#include "mvbc_p.h"
+
+#define SDRAM_MODE 0x00CD0000
+#define SDRAM_CONTROL 0x504F0000
+#define SDRAM_CONFIG1 0xD2322800
+#define SDRAM_CONFIG2 0x8AD70000
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void sdram_start (int hi_addr)
+{
+ long hi_bit = hi_addr ? 0x01000000 : 0;
+
+ /* unlock mode register */
+ out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000000 | hi_bit);
+
+ /* precharge all banks */
+ out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000002 | hi_bit);
+
+ /* precharge all banks */
+ out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000002 | hi_bit);
+
+ /* auto refresh */
+ out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | 0x80000004 | hi_bit);
+
+ /* set mode register */
+ out_be32((u32*)MPC5XXX_SDRAM_MODE, SDRAM_MODE);
+
+ /* normal operation */
+ out_be32((u32*)MPC5XXX_SDRAM_CTRL, SDRAM_CONTROL | hi_bit);
+}
+
+phys_addr_t initdram (int board_type)
+{
+ ulong dramsize = 0;
+ ulong test1,
+ test2;
+
+ /* setup SDRAM chip selects */
+ out_be32((u32*)MPC5XXX_SDRAM_CS0CFG, 0x0000001e);
+
+ /* setup config registers */
+ out_be32((u32*)MPC5XXX_SDRAM_CONFIG1, SDRAM_CONFIG1);
+ out_be32((u32*)MPC5XXX_SDRAM_CONFIG2, SDRAM_CONFIG2);
+
+ /* find RAM size using SDRAM CS0 only */
+ sdram_start(0);
+ test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
+ sdram_start(1);
+ test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
+ if (test1 > test2) {
+ sdram_start(0);
+ dramsize = test1;
+ } else
+ dramsize = test2;
+
+ if (dramsize < (1 << 20))
+ dramsize = 0;
+
+ if (dramsize > 0)
+ out_be32((u32*)MPC5XXX_SDRAM_CS0CFG, 0x13 +
+ __builtin_ffs(dramsize >> 20) - 1);
+ else
+ out_be32((u32*)MPC5XXX_SDRAM_CS0CFG, 0);
+
+ return dramsize;
+}
+
+void mvbc_init_gpio(void)
+{
+ struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
+
+ printf("Ports : 0x%08x\n", gpio->port_config);
+ printf("PORCFG: 0x%08x\n", *(vu_long*)MPC5XXX_CDM_PORCFG);
+
+ out_be32(&gpio->simple_ddr, SIMPLE_DDR);
+ out_be32(&gpio->simple_dvo, SIMPLE_DVO);
+ out_be32(&gpio->simple_ode, SIMPLE_ODE);
+ out_be32(&gpio->simple_gpioe, SIMPLE_GPIOEN);
+
+ out_be32((u32*)&gpio->sint_ode, SINT_ODE);
+ out_be32((u32*)&gpio->sint_ddr, SINT_DDR);
+ out_be32((u32*)&gpio->sint_dvo, SINT_DVO);
+ out_be32((u32*)&gpio->sint_inten, SINT_INTEN);
+ out_be32((u32*)&gpio->sint_itype, SINT_ITYPE);
+ out_be32((u32*)&gpio->sint_gpioe, SINT_GPIOEN);
+
+ out_8((u8*)MPC5XXX_WU_GPIO_ODE, WKUP_ODE);
+ out_8((u8*)MPC5XXX_WU_GPIO_DIR, WKUP_DIR);
+ out_8((u8*)MPC5XXX_WU_GPIO_DATA_O, WKUP_DO);
+ out_8((u8*)MPC5XXX_WU_GPIO_ENABLE, WKUP_EN);
+
+ printf("simple_gpioe: 0x%08x\n", gpio->simple_gpioe);
+ printf("sint_gpioe : 0x%08x\n", gpio->sint_gpioe);
+}
+
+void reset_environment(void)
+{
+ char *s, sernr[64];
+
+ printf("\n*** RESET ENVIRONMENT ***\n");
+ memset(sernr, 0, sizeof(sernr));
+ s = getenv("serial#");
+ if (s) {
+ printf("found serial# : %s\n", s);
+ strncpy(sernr, s, 64);
+ }
+ gd->env_valid = 0;
+ env_relocate();
+ if (s)
+ setenv("serial#", sernr);
+}
+
+int misc_init_r(void)
+{
+ char *s = getenv("reset_env");
+
+ if (!s) {
+ if (in_8((u8*)MPC5XXX_WU_GPIO_DATA_I) & MPC5XXX_GPIO_WKUP_6)
+ return 0;
+ udelay(50000);
+ if (in_8((u8*)MPC5XXX_WU_GPIO_DATA_I) & MPC5XXX_GPIO_WKUP_6)
+ return 0;
+ udelay(50000);
+ if (in_8((u8*)MPC5XXX_WU_GPIO_DATA_I) & MPC5XXX_GPIO_WKUP_6)
+ return 0;
+ }
+ printf(" === FACTORY RESET ===\n");
+ reset_environment();
+ saveenv();
+
+ return -1;
+}
+
+int checkboard(void)
+{
+ mvbc_init_gpio();
+ printf("Board: Matrix Vision mvBlueCOUGAR-P\n");
+
+ return 0;
+}
+
+void flash_preinit(void)
+{
+ /*
+ * Now, when we are in RAM, enable flash write
+ * access for detection process.
+ * Note that CS_BOOT cannot be cleared when
+ * executing in flash.
+ */
+ clrbits_be32((u32*)MPC5XXX_BOOTCS_CFG, 0x1);
+}
+
+void flash_afterinit(ulong size)
+{
+ out_be32((u32*)MPC5XXX_BOOTCS_START, START_REG(CFG_BOOTCS_START |
+ size));
+ out_be32((u32*)MPC5XXX_CS0_START, START_REG(CFG_BOOTCS_START |
+ size));
+ out_be32((u32*)MPC5XXX_BOOTCS_STOP, STOP_REG(CFG_BOOTCS_START | size,
+ size));
+ out_be32((u32*)MPC5XXX_CS0_STOP, STOP_REG(CFG_BOOTCS_START | size,
+ size));
+}
+
+void pci_mvbc_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
+{
+ unsigned char line = 0xff;
+ u32 base;
+
+ if (PCI_BUS(dev) == 0) {
+ switch (PCI_DEV (dev)) {
+ case 0xa: /* FPGA */
+ line = 3;
+ pci_hose_read_config_dword(hose, dev, PCI_BASE_ADDRESS_0, &base);
+ printf("found FPA - enable arbitration\n");
+ writel(0x03, (u32*)(base + 0x80c0));
+ writel(0xf0, (u32*)(base + 0x8080));
+ break;
+ case 0xb: /* LAN */
+ line = 2;
+ break;
+ case 0x1a:
+ break;
+ default:
+ printf ("***pci_scan: illegal dev = 0x%08x\n", PCI_DEV (dev));
+ break;
+ }
+ pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, line);
+ }
+}
+
+struct pci_controller hose = {
+ fixup_irq:pci_mvbc_fixup_irq
+};
+
+int mvbc_p_load_fpga(void)
+{
+ size_t data_size = 0;
+ void *fpga_data = NULL;
+ char *datastr = getenv("fpgadata");
+ char *sizestr = getenv("fpgadatasize");
+
+ if (datastr)
+ fpga_data = (void *)simple_strtoul(datastr, NULL, 16);
+ if (sizestr)
+ data_size = (size_t)simple_strtoul(sizestr, NULL, 16);
+
+ return fpga_load(0, fpga_data, data_size);
+}
+
+extern void pci_mpc5xxx_init(struct pci_controller *);
+
+void pci_init_board(void)
+{
+ char *s;
+ int load_fpga = 1;
+
+ mvbc_p_init_fpga();
+ s = getenv("skip_fpga");
+ if (s) {
+ printf("found 'skip_fpga' -> FPGA _not_ loaded !\n");
+ load_fpga = 0;
+ }
+ if (load_fpga) {
+ printf("loading FPGA ... ");
+ mvbc_p_load_fpga();
+ printf("done\n");
+ }
+ pci_mpc5xxx_init(&hose);
+}
+
+u8 *dhcp_vendorex_prep(u8 *e)
+{
+ char *ptr;
+
+ /* DHCP vendor-class-identifier = 60 */
+ if ((ptr = getenv("dhcp_vendor-class-identifier"))) {
+ *e++ = 60;
+ *e++ = strlen(ptr);
+ while (*ptr)
+ *e++ = *ptr++;
+ }
+ /* DHCP_CLIENT_IDENTIFIER = 61 */
+ if ((ptr = getenv("dhcp_client_id"))) {
+ *e++ = 61;
+ *e++ = strlen(ptr);
+ while (*ptr)
+ *e++ = *ptr++;
+ }
+
+ return e;
+}
+
+u8 *dhcp_vendorex_proc (u8 *popt)
+{
+ return NULL;
+}
+
+void show_boot_progress(int val)
+{
+ struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio*)MPC5XXX_GPIO;
+
+ switch(val) {
+ case 0: /* FPGA ok */
+ setbits_be32(&gpio->simple_dvo, 0x80);
+ break;
+ case 1:
+ setbits_be32(&gpio->simple_dvo, 0x40);
+ break;
+ case 12:
+ setbits_be32(&gpio->simple_dvo, 0x20);
+ break;
+ case 15:
+ setbits_be32(&gpio->simple_dvo, 0x10);
+ break;
+ default:
+ break;
+ }
+
+}
+
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ ft_cpu_setup(blob, bd);
+ fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
+}
--- /dev/null
+#ifndef __MVBC_H__
+#define __MVBC_H__
+
+#define LED_G0 MPC5XXX_GPIO_SIMPLE_PSC2_0
+#define LED_G1 MPC5XXX_GPIO_SIMPLE_PSC2_1
+#define LED_Y MPC5XXX_GPIO_SIMPLE_PSC2_2
+#define LED_R MPC5XXX_GPIO_SIMPLE_PSC2_3
+#define ARB_X_EN MPC5XXX_GPIO_WKUP_PSC2_4
+
+#define FPGA_DIN MPC5XXX_GPIO_SIMPLE_PSC3_0
+#define FPGA_CCLK MPC5XXX_GPIO_SIMPLE_PSC3_1
+#define FPGA_CONF_DONE MPC5XXX_GPIO_SIMPLE_PSC3_2
+#define FPGA_CONFIG MPC5XXX_GPIO_SIMPLE_PSC3_3
+#define FPGA_STATUS MPC5XXX_GPIO_SINT_PSC3_4
+
+#define MAN_RST MPC5XXX_GPIO_WKUP_PSC6_0
+#define WD_TS MPC5XXX_GPIO_WKUP_PSC6_1
+#define WD_WDI MPC5XXX_GPIO_SIMPLE_PSC6_2
+#define COP_PRESENT MPC5XXX_GPIO_SIMPLE_PSC6_3
+#define FACT_RST MPC5XXX_GPIO_WKUP_6
+#define FLASH_RBY MPC5XXX_GPIO_WKUP_7
+
+#define SIMPLE_DDR (LED_G0 | LED_G1 | LED_Y | LED_R | \
+ FPGA_DIN | FPGA_CCLK | FPGA_CONFIG | WD_WDI)
+#define SIMPLE_DVO (FPGA_CONFIG)
+#define SIMPLE_ODE (FPGA_CONFIG)
+#define SIMPLE_GPIOEN (LED_G0 | LED_G1 | LED_Y | LED_R | \
+ FPGA_DIN | FPGA_CCLK | FPGA_CONF_DONE | FPGA_CONFIG |\
+ WD_WDI | COP_PRESENT)
+
+#define SINT_ODE 0
+#define SINT_DDR 0
+#define SINT_DVO 0
+#define SINT_INTEN 0
+#define SINT_ITYPE 0
+#define SINT_GPIOEN (FPGA_STATUS)
+
+#define WKUP_ODE (MAN_RST)
+#define WKUP_DIR (ARB_X_EN|MAN_RST|WD_TS)
+#define WKUP_DO (ARB_X_EN|MAN_RST|WD_TS)
+#define WKUP_EN (ARB_X_EN|MAN_RST|WD_TS|FACT_RST|FLASH_RBY)
+
+#endif
--- /dev/null
+echo
+echo "==== running autoscript ===="
+echo
+setenv bootdtb bootm \${kernel_boot} \${mv_initrd_addr_ram} \${mv_dtb_addr_ram}
+setenv ramkernel setenv kernel_boot \${loadaddr}
+setenv flashkernel setenv kernel_boot \${mv_kernel_addr}
+setenv cpird cp \${mv_initrd_addr} \${mv_initrd_addr_ram} \${mv_initrd_length}
+setenv bootfromflash run flashkernel cpird ramparam addcons e1000para bootdtb
+setenv getdtb tftp \${mv_dtb_addr_ram} \${dtb_name}
+setenv cpdtb cp \${mv_dtb_addr} \${mv_dtb_addr_ram} 0x2000
+setenv rundtb fdt addr \${mv_dtb_addr_ram}\;fdt boardsetup
+setenv bootfromnet tftp \${mv_initrd_addr_ram} \${initrd_name}\;run ramkernel
+if test ${console} = yes;
+then
+setenv addcons setenv bootargs \${bootargs} console=ttyPSC\${console_nr},\${baudrate}N8
+else
+setenv addcons setenv bootargs \${bootargs} console=tty0
+fi
+setenv e1000para setenv bootargs \${bootargs} e1000.TxDescriptors=1500 e1000.SmartPowerDownEnable=1
+setenv set_static_ip setenv ipaddr \${static_ipaddr}
+setenv set_static_nm setenv netmask \${static_netmask}
+setenv set_static_gw setenv gatewayip \${static_gateway}
+setenv set_ip setenv ip \${ipaddr}::\${gatewayip}:\${netmask}
+setenv ramparam setenv bootargs root=/dev/ram0 ro rootfstype=squashfs
+if test ${autoscr_boot} != no;
+then
+ if test ${netboot} = yes;
+ then
+ bootp
+ if test $? = 0;
+ then
+ echo "=== bootp succeeded -> netboot ==="
+ run set_ip
+ run getdtb rundtb bootfromnet ramparam addcons e1000para bootdtb
+ else
+ echo "=== netboot failed ==="
+ fi
+ fi
+ run set_static_ip set_static_nm set_static_gw set_ip
+ echo "=== bootfromflash ==="
+ run cpdtb rundtb bootfromflash
+else
+ echo "=== boot stopped with autoscr_boot no ==="
+fi
unsigned long long result;
int rc = ERR_OK;
- result=*addr;
+ result = *addr;
if ((result & data) != data)
return ERR_NOT_ERASED;
eieio();
do {
- result=*addr;
+ result = *addr;
} while(~result & BIT_BUSY);
*addr=CMD_READ_ARRAY;
}
while(cnt>=8) {
- data=*((unsigned long long *)src);
+ data = *((unsigned long long *)src);
if ((rc = write_word(info, wp, data)) != 0)
return rc;
src+=8;
unsigned off;
uchar *name, *value;
- name=&name_buf[0];
- value=&value_buf[0];
+ name = &name_buf[0];
+ value = &value_buf[0];
len=size;
off = sizeof(long);
while (len > off) {
if(c == '\0')
break;
} while(len > off);
- name=&name_buf[0];
- value=&value_buf[0];
+ name = &name_buf[0];
+ value = &value_buf[0];
if(strncmp((char *)name,"baudrate",8)!=0) {
setenv((char *)name,(char *)value);
}
++s;
break;
}
- buf[i++]=*s;
+ buf[i++] = *s;
}
sprintf(&buf[i]," SN ");
i+=4;
for (; s < e; ++s) {
- buf[i++]=*s;
+ buf[i++] = *s;
}
buf[i++]=0;
}
unsigned long size_b1,flashcr,size_reg;
int mode;
extern char version_string;
- char *p=&version_string;
+ char *p = &version_string;
/* Since we are relocated, we can set-up the CS finally */
setup_cs_reloc();
int val;
unsigned char status;
- val=-1;
+ val = -1;
status = kbd_read_status();
if (status & KBD_STAT_OBF) {
val = kbd_read_input();
uhci_td_t *td,*prevtd;
for(i=0;i<8;i++) {
- prevtd=&td_int[i]; /* the first previous td is the skeleton td */
+ prevtd = &td_int[i]; /* the first previous td is the skeleton td */
link=swap_32(td_int[i].link) & 0xfffffff0; /* next in chain */
td=(uhci_td_t *)link; /* assign it */
/* all interrupt TDs are finally linked to the td_int[0].
return 1;
irq_free_handler(irqvec);
reset_hc();
- irqvec=-1;
+ irqvec = -1;
return 0;
}
#include <ioports.h>
#include <spd_sdram.h>
#include <miiphy.h>
+#include <libfdt.h>
+#include <fdt_support.h>
long int fixed_sdram (void);
#ifndef CFG_RAMBOOT
volatile ccsr_ddr_t *ddr= (void *)(CFG_MPC85xx_DDR_ADDR);
+#if (CFG_SDRAM_SIZE == 512)
+ ddr->cs0_bnds = 0x0000000f;
+#else
ddr->cs0_bnds = 0x00000007;
+#endif
ddr->cs1_bnds = 0x0010001f;
ddr->cs2_bnds = 0x00000000;
ddr->cs3_bnds = 0x00000000;
return CFG_SDRAM_SIZE * 1024 * 1024;
}
#endif /* !defined(CONFIG_SPD_EEPROM) */
+
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+void
+ft_board_setup(void *blob, bd_t *bd)
+{
+ int node, tmp[2];
+#ifdef CONFIG_PCI
+ const char *path;
+#endif
+
+ ft_cpu_setup(blob, bd);
+
+ node = fdt_path_offset(blob, "/aliases");
+ tmp[0] = 0;
+ if (node >= 0) {
+#ifdef CONFIG_PCI
+ path = fdt_getprop(blob, node, "pci0", NULL);
+ if (path) {
+ tmp[1] = hose.last_busno - hose.first_busno;
+ do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1);
+ }
+#endif
+ }
+}
+#endif
*
* Always return 1
*/
+#if defined(CONFIG_QS850)
+#define BOARD_IDENTITY "QS850"
+#elif defined(CONFIG_QS823)
+#define BOARD_IDENTITY "QS823"
+#else
+#define BOARD_IDENTITY "QS???"
+#endif
int checkboard (void)
{
i = getenv_r("serial#", buf, sizeof(buf));
s = (i>0) ? buf : NULL;
-#ifdef CONFIG_QS850
- if (!s || strncmp(s, "QS850", 5)) {
- puts ("### No HW ID - assuming QS850");
-#endif
-#ifdef CONFIG_QS823
- if (!s || strncmp(s, "QS823", 5)) {
- puts ("### No HW ID - assuming QS823");
-#endif
+ if (!s || strncmp(s, BOARD_IDENTITY, 5)) {
+ puts ("### No HW ID - assuming " BOARD_IDENTITY);
} else {
for (e=s; *e; ++e) {
if (*e == ' ')
psc->command = (PSC_RX_ENABLE | PSC_TX_ENABLE);
for(i = 0;i < (len / 4); i++) {
- swapped[3]=*wave_file++;
- swapped[2]=*wave_file++;
- swapped[1]=*wave_file++;
- swapped[0]=*wave_file++;
+ swapped[3] = *wave_file++;
+ swapped[2] = *wave_file++;
+ swapped[1] = *wave_file++;
+ swapped[0] = *wave_file++;
psc->psc_buffer_32 = *((unsigned long*)swapped);
while (psc->tfnum > 400) {
if(ctrlc())
iflag = disable_interrupts();
#if (CONFIG_COMMANDS & CFG_CMD_USB)
- /*
- * turn off USB to prevent the host controller from writing to the
- * SDRAM while Linux is booting. This could happen (at least for OHCI
- * controller), because the HCCA (Host Controller Communication Area)
- * lies within the SDRAM and the host controller writes continously to
- * this area (as busmaster!). The HccaFrameNumber is for example
- * updated every 1 ms within the HCCA structure in SDRAM! For more
- * details see the OpenHCI specification.
- */
+ /*
+ * turn off USB to prevent the host controller from writing to the
+ * SDRAM while Linux is booting. This could happen (at least for OHCI
+ * controller), because the HCCA (Host Controller Communication Area)
+ * lies within the SDRAM and the host controller writes continously to
+ * this area (as busmaster!). The HccaFrameNumber is for example
+ * updated every 1 ms within the HCCA structure in SDRAM! For more
+ * details see the OpenHCI specification.
+ */
usb_stop();
#endif
if(readblk>blocks) /* is end within 1st track */
readblk=blocks; /* yes, correct it */
PRINTF("we read %ld blocks start %ld\n",readblk,pCMD->blnr);
- bufferw=&buffer[0]; /* setup working buffer */
+ bufferw = &buffer[0]; /* setup working buffer */
do {
retryrw:
len=sect_size * readblk;
* we need to get the results */
fdc_terminate(pCMD);
offset+=(sect_size*readblk); /* set up buffer pointer */
- bufferw=&buffer[offset];
+ bufferw = &buffer[offset];
pCMD->blnr+=readblk; /* update current block nr */
blocks-=readblk; /* update blocks */
if(blocks==0)
s_last [bank] = -1; /* last sector to erase */
}
- for (bank=0,info=&flash_info[0];
+ for (bank=0,info = &flash_info[0];
(bank < CFG_MAX_FLASH_BANKS) && (addr_first <= addr_last);
++bank, ++info) {
ulong b_end;
s_first, s_last, &planned );
if (planned && (rcode == 0)) {
- for (bank=0,info=&flash_info[0];
+ for (bank=0,info = &flash_info[0];
(bank < CFG_MAX_FLASH_BANKS) && (rcode == 0);
++bank, ++info) {
if (s_first[bank]>=0) {
protected = 0;
if (planned && (rcode == 0)) {
- for (bank=0,info=&flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
+ for (bank=0,info = &flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
if (info->flash_id == FLASH_UNKNOWN) {
continue;
}
length = (*dataptr << 8) + *(dataptr+1);
dataptr+=2;
for(i=0;i<length;i++)
- buffer[i]=*dataptr++;
+ buffer[i] = *dataptr++;
printf(" design filename = \"%s\"\n", buffer);
length = (*dataptr << 8) + *(dataptr+1);
dataptr+=2;
for(i=0;i<length;i++)
- buffer[i]=*dataptr++;
+ buffer[i] = *dataptr++;
printf(" part number = \"%s\"\n", buffer);
/* get date (identifier, length, string) */
length = (*dataptr << 8) + *(dataptr+1);
dataptr+=2;
for(i=0;i<length;i++)
- buffer[i]=*dataptr++;
+ buffer[i] = *dataptr++;
printf(" date = \"%s\"\n", buffer);
/* get time (identifier, length, string) */
length = (*dataptr << 8) + *(dataptr+1);
dataptr+=2;
for(i=0;i<length;i++)
- buffer[i]=*dataptr++;
+ buffer[i] = *dataptr++;
printf(" time = \"%s\"\n", buffer);
/* get fpga data length (identifier, length) */
cpuid = simple_strtoul(argv[1], NULL, 10);
if (cpuid >= CONFIG_NR_CPUS) {
- printf ("Core num: %d is out of range[0..%d]\n",
+ printf ("Core num: %lu is out of range[0..%d]\n",
cpuid, CONFIG_NR_CPUS - 1);
return 1;
}
if(scsi_max_devs>0)
scsi_curr_dev=0;
else
- scsi_curr_dev=-1;
+ scsi_curr_dev = -1;
}
#include <usb.h>
#ifdef CONFIG_USB_STORAGE
-static int usb_stor_curr_dev=-1; /* current device */
+static int usb_stor_curr_dev = -1; /* current device */
#endif
/* some display routines (info command) */
device_t *dev = NULL;
char temp_names[3][8];
- dev_index=-1;
+ dev_index = -1;
for (i=1; i<=ListNumItems(devlist); i++) {
dev = ListGetPtrToItem (devlist, i);
if(strcmp(dev->name,devname)==0) {
prop, compat, fdt_strerror(err));
}
#endif /* CONFIG_HAS_FSL_DR_USB */
+
+#if defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx)
+/*
+ * update crypto node properties to a specified revision of the SEC
+ * called with sec_rev == 0 if not on an mpc8xxxE processor
+ */
+void fdt_fixup_crypto_node(void *blob, int sec_rev)
+{
+ const struct sec_rev_prop {
+ u32 sec_rev;
+ u32 num_channels;
+ u32 channel_fifo_len;
+ u32 exec_units_mask;
+ u32 descriptor_types_mask;
+ } sec_rev_prop_list [] = {
+ { 0x0200, 4, 24, 0x07e, 0x01010ebf }, /* SEC 2.0 */
+ { 0x0201, 4, 24, 0x0fe, 0x012b0ebf }, /* SEC 2.1 */
+ { 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
+ { 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
+ { 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
+ { 0x0303, 4, 24, 0x97c, 0x03ab0abf }, /* SEC 3.3 */
+ };
+ char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
+ sizeof("fsl,secX.Y")];
+ int crypto_node, sec_idx, err;
+ char *p;
+ u32 val;
+
+ /* locate crypto node based on lowest common compatible */
+ crypto_node = fdt_node_offset_by_compatible(blob, -1, "fsl,sec2.0");
+ if (crypto_node == -FDT_ERR_NOTFOUND)
+ return;
+
+ /* delete it if not on an E-processor */
+ if (crypto_node > 0 && !sec_rev) {
+ fdt_del_node(blob, crypto_node);
+ return;
+ }
+
+ /* else we got called for possible uprev */
+ for (sec_idx = 0; sec_idx < ARRAY_SIZE(sec_rev_prop_list); sec_idx++)
+ if (sec_rev_prop_list[sec_idx].sec_rev == sec_rev)
+ break;
+
+ if (sec_idx == ARRAY_SIZE(sec_rev_prop_list)) {
+ puts("warning: unknown SEC revision number\n");
+ return;
+ }
+
+ val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].num_channels);
+ err = fdt_setprop(blob, crypto_node, "fsl,num-channels", &val, 4);
+ if (err < 0)
+ printf("WARNING: could not set crypto property: %s\n",
+ fdt_strerror(err));
+
+ val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].descriptor_types_mask);
+ err = fdt_setprop(blob, crypto_node, "fsl,descriptor-types-mask", &val, 4);
+ if (err < 0)
+ printf("WARNING: could not set crypto property: %s\n",
+ fdt_strerror(err));
+
+ val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].exec_units_mask);
+ err = fdt_setprop(blob, crypto_node, "fsl,exec-units-mask", &val, 4);
+ if (err < 0)
+ printf("WARNING: could not set crypto property: %s\n",
+ fdt_strerror(err));
+
+ val = cpu_to_fdt32(sec_rev_prop_list[sec_idx].channel_fifo_len);
+ err = fdt_setprop(blob, crypto_node, "fsl,channel-fifo-len", &val, 4);
+ if (err < 0)
+ printf("WARNING: could not set crypto property: %s\n",
+ fdt_strerror(err));
+
+ val = 0;
+ while (sec_idx >= 0) {
+ p = compat_strlist + val;
+ val += sprintf(p, "fsl,sec%d.%d",
+ (sec_rev_prop_list[sec_idx].sec_rev & 0xff00) >> 8,
+ sec_rev_prop_list[sec_idx].sec_rev & 0x00ff) + 1;
+ sec_idx--;
+ }
+ err = fdt_setprop(blob, crypto_node, "compatible", &compat_strlist, val);
+ if (err < 0)
+ printf("WARNING: could not set crypto property: %s\n",
+ fdt_strerror(err));
+}
+#endif /* defined(CONFIG_MPC83XX) || defined(CONFIG_MPC85xx) */
flash_info_t *info;
int i;
- for (i=0, info=&flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
+ for (i=0, info = &flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
if (info->flash_id != FLASH_UNKNOWN &&
addr >= info->start[0] &&
/* WARNING - The '- 1' is needed if the flash
static int static_get(struct in_str *i)
{
- int ch=*i->p++;
+ int ch = *i->p++;
if (ch=='\0') return EOF;
return ch;
}
ch = 0;
/* If there is data waiting, eat it up */
if (i->p && *i->p) {
- ch=*i->p++;
+ ch = *i->p++;
} else {
/* need to double check i->file because we might be doing something
* more complicated by now, like sourcing or substituting. */
i->__promptme = 0;
#endif
if (i->p && *i->p) {
- ch=*i->p++;
+ ch = *i->p++;
}
#ifndef __U_BOOT__
} else {
debug ("Logo: width %d height %d colors %d cmap %d\n",
BMP_LOGO_WIDTH, BMP_LOGO_HEIGHT, BMP_LOGO_COLORS,
- sizeof(bmp_logo_palette)/(sizeof(ushort)));
+ (int)(sizeof(bmp_logo_palette)/(sizeof(ushort))));
bmap = &bmp_logo_bitmap[0];
fb = (uchar *)(lcd_base + y * lcd_line_length + x);
WATCHDOG_RESET();
for (j = 0; j < width ; j++)
#if defined(CONFIG_PXA250)
- *(fb++)=*(bmap++);
+ *(fb++) = *(bmap++);
#elif defined(CONFIG_MPC823) || defined(CONFIG_MCC200)
*(fb++)=255-*(bmap++);
#endif
for(i=0; i<dev->config.bNumInterfaces;i++) {
for(ii=0; ii<dev->config.if_desc[i].bNumEndpoints; ii++) {
- ep=&dev->config.if_desc[i].ep_desc[ii];
+ ep = &dev->config.if_desc[i].ep_desc[ii];
b=ep->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
if((ep->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK)==USB_ENDPOINT_XFER_CONTROL) { /* Control => bidirectional */
if (size <= 0 || !buf || !index)
return -1;
buf[0] = 0;
- tbuf=&mybuf[0];
+ tbuf = &mybuf[0];
/* get langid for strings if it's not yet known */
if (!dev->have_langid) {
/* first make all devices unknown */
for(i=0;i<USB_MAX_DEVICE;i++) {
memset(&usb_dev[i],0,sizeof(struct usb_device));
- usb_dev[i].devnum=-1;
+ usb_dev[i].devnum = -1;
}
dev_index=0;
/* device 0 is always present (root hub, so let it analyze) */
return -1;
}
printf(" report descriptor (size %u, read %d)\n", len, index);
- start=&buffer[0];
- end=&buffer[len];
+ start = &buffer[0];
+ end = &buffer[len];
i=0;
do {
index=fetch_item(start,end,&item);
ccb reqsrb;
int retry,notready;
- psrb=&reqsrb;
+ psrb = &reqsrb;
status=USB_STOR_TRANSPORT_GOOD;
retry=0;
notready=0;
psrb->cmd[1]=srb->lun<<5;
psrb->cmd[4]=18;
psrb->datalen=18;
- psrb->pdata=&srb->sense_buf[0];
+ psrb->pdata = &srb->sense_buf[0];
psrb->cmdlen=12;
/* issue the command */
result=usb_stor_CB_comdat(psrb,us);
srb->cmd[1]=srb->lun<<5;
srb->cmd[4]=18;
srb->datalen=18;
- srb->pdata=&srb->sense_buf[0];
+ srb->pdata = &srb->sense_buf[0];
srb->cmdlen=12;
ss->transport(srb,ss);
USB_STOR_PRINTF("Request Sense returned %02X %02X %02X\n",srb->sense_buf[2],srb->sense_buf[12],srb->sense_buf[13]);
phy.auto_negotiate = gen_auto_negotiate;
}
+ printf("Ethernet PHY: %s\n", phy.name);
+
return(1);
}
* Init onboard 16550 UART
*/
outb(0x80, UART1_BASE + UART_LCR); /* set DLAB bit */
- outb(bdiv & 0xff), UART1_BASE + UART_DLL); /* set divisor for 9600 baud */
- outb(bdiv >> 8), UART1_BASE + UART_DLM); /* set divisor for 9600 baud */
+ outb((bdiv & 0xff), UART1_BASE + UART_DLL); /* set divisor for 9600 baud */
+ outb((bdiv >> 8 ), UART1_BASE + UART_DLM); /* set divisor for 9600 baud */
outb(0x03, UART1_BASE + UART_LCR); /* line control 8 bits no parity */
outb(0x00, UART1_BASE + UART_FCR); /* disable FIFO */
outb(0x00, UART1_BASE + UART_MCR); /* no modem control DTR RTS */
p = npe_alloc_free;
npe_alloc_free += size;
} else {
- printf("%s: failed (count=%d, size=%d)!\n", count, size);
+ printf("npe_alloc: failed (count=%d, size=%d)!\n", count, size);
}
return p;
}
#include <common.h>
#include <libfdt.h>
#include <fdt_support.h>
+#include <asm/processor.h>
extern void ft_qe_setup(void *blob);
void ft_cpu_setup(void *blob, bd_t *bd)
{
+ immap_t *immr = (immap_t *)CFG_IMMR;
+ int spridr = immr->sysconf.spridr;
+
+ /*
+ * delete crypto node if not on an E-processor
+ * initial revisions of the MPC834xE/6xE have the original SEC 2.0.
+ * EA revisions got the SEC uprevved to 2.4 but since the default device
+ * tree contains SEC 2.0 properties we uprev them here.
+ */
+ if (!IS_E_PROCESSOR(spridr))
+ fdt_fixup_crypto_node(blob, 0);
+ else if (IS_E_PROCESSOR(spridr) &&
+ (SPR_FAMILY(spridr) == SPR_834X_FAMILY ||
+ SPR_FAMILY(spridr) == SPR_836X_FAMILY) &&
+ REVID_MAJOR(spridr) >= 2)
+ fdt_fixup_crypto_node(blob, 0x0204);
+
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
fdt_fixup_ethernet(blob, bd);
#ifdef CFG_NS16550
do_fixup_by_compat_u32(blob, "ns16550",
- "clock-frequency", bd->bi_busfreq, 1);
+ "clock-frequency", CFG_NS16550_CLK, 1);
#endif
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
if (cpu) {
puts(cpu->name);
- if (svr & 0x80000)
+ if (IS_E_PROCESSOR(svr))
puts("E");
} else {
puts("Unknown");
volatile uint cache_ctl;
uint svr, ver;
uint l2srbar;
+ u32 l2siz_field;
svr = get_svr();
ver = SVR_SOC_VER(svr);
asm("msync;isync");
cache_ctl = l2cache->l2ctl;
+ l2siz_field = (cache_ctl >> 28) & 0x3;
- switch (cache_ctl & 0x30000000) {
- case 0x20000000:
- if (ver == SVR_8548 || ver == SVR_8548_E ||
- ver == SVR_8544 || ver == SVR_8568_E) {
- puts ("512 KB ");
- /* set L2E=1, L2I=1, & L2SRAM=0 */
- cache_ctl = 0xc0000000;
+ switch (l2siz_field) {
+ case 0x0:
+ printf(" unknown size (0x%08x)\n", cache_ctl);
+ return -1;
+ break;
+ case 0x1:
+ if (ver == SVR_8540 || ver == SVR_8560 ||
+ ver == SVR_8541 || ver == SVR_8541_E ||
+ ver == SVR_8555 || ver == SVR_8555_E) {
+ puts("128 KB ");
+ /* set L2E=1, L2I=1, & L2BLKSZ=1 (128 Kbyte) */
+ cache_ctl = 0xc4000000;
} else {
+ puts("256 KB ");
+ cache_ctl = 0xc0000000; /* set L2E=1, L2I=1, & L2SRAM=0 */
+ }
+ break;
+ case 0x2:
+ if (ver == SVR_8540 || ver == SVR_8560 ||
+ ver == SVR_8541 || ver == SVR_8541_E ||
+ ver == SVR_8555 || ver == SVR_8555_E) {
puts("256 KB ");
/* set L2E=1, L2I=1, & L2BLKSZ=2 (256 Kbyte) */
cache_ctl = 0xc8000000;
+ } else {
+ puts ("512 KB ");
+ /* set L2E=1, L2I=1, & L2SRAM=0 */
+ cache_ctl = 0xc0000000;
}
break;
- case 0x10000000:
- puts("256 KB ");
- if (ver == SVR_8544 || ver == SVR_8544_E) {
- cache_ctl = 0xc0000000; /* set L2E=1, L2I=1, & L2SRAM=0 */
- }
+ case 0x3:
+ puts("1024 KB ");
+ /* set L2E=1, L2I=1, & L2SRAM=0 */
+ cache_ctl = 0xc0000000;
break;
- case 0x30000000:
- case 0x00000000:
- default:
- printf(" unknown size (0x%08x)\n", cache_ctl);
- return -1;
}
if (l2cache->l2ctl & 0x80000000) {
#include <asm/processor.h>
extern void ft_qe_setup(void *blob);
+
#ifdef CONFIG_MP
#include "mp.h"
DECLARE_GLOBAL_DATA_PTR;
void ft_cpu_setup(void *blob, bd_t *bd)
{
+ /* delete crypto node if not on an E-processor */
+ if (!IS_E_PROCESSOR(get_svr()))
+ fdt_fixup_crypto_node(blob, 0);
+
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
fdt_fixup_ethernet(blob, bd);
#ifdef CFG_NS16550
do_fixup_by_compat_u32(blob, "ns16550",
- "clock-frequency", bd->bi_busfreq, 1);
+ "clock-frequency", CFG_NS16550_CLK, 1);
#endif
#ifdef CONFIG_CPM2
if (nr == id) {
table = (u32 *)get_spin_addr();
- printf("table base @ 0x%08x\n", table);
+ printf("table base @ 0x%p\n", table);
} else {
table = (u32 *)get_spin_addr() + nr * NUM_BOOT_ENTRY;
printf("Running on cpu %d\n", id);
printf("\n");
- printf("table @ 0x%08x:\n", table);
+ printf("table @ 0x%p\n", table);
printf(" addr - 0x%08x\n", table[BOOT_ENTRY_ADDR_LOWER]);
printf(" pir - 0x%08x\n", table[BOOT_ENTRY_PIR]);
printf(" r3 - 0x%08x\n", table[BOOT_ENTRY_R3_LOWER]);
lis r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_16M)@h
ori r7,r7,FSL_BOOKE_MAS1(1, 1, 0, 1, BOOKE_PAGESZ_16M)@l
- lis r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@h
- ori r8,r8,FSL_BOOKE_MAS2(TEXT_BASE, (MAS2_I|MAS2_G))@l
+ /* Align the mapping to 16MB */
+ lis r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xff000000, (MAS2_I|MAS2_G))@h
+ ori r8,r8,FSL_BOOKE_MAS2(TEXT_BASE & 0xff000000, (MAS2_I|MAS2_G))@l
- lis r9,FSL_BOOKE_MAS3(0xff800000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
- ori r9,r9,FSL_BOOKE_MAS3(0xff800000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
+ lis r9,FSL_BOOKE_MAS3(0xff000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@h
+ ori r9,r9,FSL_BOOKE_MAS3(0xff000000, 0, (MAS3_SX|MAS3_SW|MAS3_SR))@l
mtspr MAS0,r6
mtspr MAS1,r7
#ifdef CFG_NS16550
do_fixup_by_compat_u32(blob, "ns16550",
- "clock-frequency", bd->bi_busfreq, 1);
+ "clock-frequency", CFG_NS16550_CLK, 1);
#endif
}
puts ("[VIDEO ENCODER] Configuring the encoder...\n");
- printf ("Sending %d bytes (@ %08lX) to I2C 0x%X:\n ",
+ printf ("Sending %zu bytes (@ %08lX) to I2C 0x%lX:\n ",
sizeof(video_encoder_data),
(ulong)video_encoder_data,
- VIDEO_I2C_ADDR);
+ (ulong)VIDEO_I2C_ADDR);
for (i=0; i<sizeof(video_encoder_data); ++i) {
printf(" %02X", video_encoder_data[i]);
}
int sdram0_pmit=0x07c00000;
#ifndef CONFIG_405EP /* not on PPC405EP */
- int sdram0_besr0=-1;
- int sdram0_besr1=-1;
- int sdram0_eccesr=-1;
+ int sdram0_besr0 = -1;
+ int sdram0_besr1 = -1;
+ int sdram0_eccesr = -1;
#endif
int sdram0_ecccfg;
--- /dev/null
+Matrix Vision mvBlueCOUGAR-P (mvBC-P)
+-------------------------------------
+
+1. Board Description
+
+ The mvBC-P is a 70x40x40mm multi board gigabit ethernet network camera
+ with main focus on GigEVision protocol in combination with local image
+ preprocessing.
+
+ Power Supply is either VDC 48V or Pover over Ethernet (PoE).
+
+2 System Components
+
+2.1 CPU
+ Freescale MPC5200B CPU running at 400MHz core and 133MHz XLB/IPB.
+ 64MB SDRAM @ 133MHz.
+ 8 MByte Nor Flash on local bus.
+ 1 serial ports. Console running on ttyS0 @ 115200 8N1.
+
+2.2 PCI
+ PCI clock fixed at 66MHz. Arbitration inside FPGA.
+ Intel GD82541ER network MAC/PHY and FPGA connected.
+
+2.3 FPGA
+ Altera Cyclone-II EP2C8 with PCI DMA engine.
+ Connects to Matrix Vision specific CCD/CMOS sensor interface.
+ Utilizes 64MB Nand Flash.
+
+2.3.1 I/O @ FPGA
+ 2 Outputs : photo coupler
+ 2 Inputs : photo coupler
+
+2.4 I2C
+ LM75 @ 0x90 for temperature monitoring.
+ EEPROM @ 0xA0 for vendor specifics.
+ image sensor interface (slave adresses depend on sensor)
+
+3 Flash layout.
+
+ reset vector is 0x00000100, i.e. "LOWBOOT".
+
+ FF800000 u-boot
+ FF840000 u-boot script image
+ FF850000 redundant u-boot script image
+ FF860000 FPGA raw bit file
+ FF8A0000 tbd.
+ FF900000 root FS
+ FFC00000 kernel
+ FFFC0000 device tree blob
+ FFFD0000 redundant device tree blob
+ FFFE0000 environment
+ FFFF0000 redundant environment
+
+ mtd partitions are propagated to linux kernel via device tree blob.
+
+4 Booting
+
+ On startup the bootscript @ FF840000 is executed. This script can be
+ exchanged easily. Default boot mode is "boot from flash", i.e. system
+ works stand-alone.
+
+ This behaviour depends on some environment variables :
+
+ "netboot" : yes ->try dhcp/bootp and boot from network.
+ A "dhcp_client_id" and "dhcp_vendor-class-identifier" can be used for
+ DHCP server configuration, e.g. to provide different images to
+ different devices.
+
+ During netboot the system tries to get 3 image files:
+ 1. Kernel - name + data is given during BOOTP.
+ 2. Initrd - name is stored in "initrd_name"
+ 3. device tree blob - name is stored in "dtb_name"
+ Fallback files are the flash versions.
pccb->msgout[0]=SCSI_IDENTIFY;
transbytes=pccb->trans_bytes;
tmpptr=pccb->pdata;
- pccb->pdata=&pccb->sense_buf[0];
+ pccb->pdata = &pccb->sense_buf[0];
datalen=pccb->datalen;
pccb->datalen=14;
tmpstat=pccb->status;
int val;
unsigned char status;
- val=-1;
+ val = -1;
status = kbd_read_status();
if (status & KBD_STAT_OBF) {
val = kbd_read_input();
/*-----------------------------------------------------------------------
* make a proper sized command based on the port and chip widths
*/
-static void flash_make_cmd (flash_info_t * info, ulong cmd, void *cmdbuf)
+static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
{
int i;
int cword_offset;
val = *((uchar*)&cmd + cword_offset);
#else
cp_offset = i - 1;
- val = *((uchar*)&cmd + sizeof(ulong) - cword_offset - 1);
+ val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
#endif
- cp[cp_offset] = (cword_offset >= sizeof(ulong)) ? 0x00 : val;
+ cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
}
}
* Write a proper sized command to the correct address
*/
static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
- uint offset, ulong cmd)
+ uint offset, u32 cmd)
{
void *addr;
pci_dev_t dev = PCI_BDF(busno,0,0);
/* Initialize ATMU registers based on hose regions and flags */
- volatile pot_t *po=&pci->pot[1]; /* skip 0 */
- volatile pit_t *pi=&pci->pit[0]; /* ranges from: 3 to 1 */
+ volatile pot_t *po = &pci->pot[1]; /* skip 0 */
+ volatile pit_t *pi = &pci->pit[0]; /* ranges from: 3 to 1 */
#ifdef DEBUG
int neg_link_w;
hose->last_busno = pci_hose_scan(hose);
return 0;
}
+
+int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
+{
+ return 0;
+}
+
+#ifdef CONFIG_PCI_SCAN_SHOW
+int pci_print_dev(struct pci_controller *hose, pci_dev_t dev)
+{
+ return 1;
+}
+#endif /* CONFIG_PCI_SCAN_SHOW */
static int calc_divisor (NS16550_t port)
{
- uint32_t clk_divisor;
-
#ifdef CONFIG_OMAP1510
/* If can't cleanly clock 115200 set div to 1 */
if ((CFG_NS16550_CLK == 12000000) && (gd->baudrate == 115200)) {
/* Compute divisor value. Normally, we should simply return:
* CFG_NS16550_CLK) / MODE_X_DIV / gd->baudrate
- * but we need to round that value by adding 0.5 (2/4).
+ * but we need to round that value by adding 0.5.
* Rounding is especially important at high baud rates.
*/
- clk_divisor = (((4 * CFG_NS16550_CLK) /
- (MODE_X_DIV * gd->baudrate)) + 2) / 4;
-
- debug("NS16550 clock divisor = %d\n", clk_divisor);
-
- return clk_divisor;
+ return (CFG_NS16550_CLK + (gd->baudrate * (MODE_X_DIV / 2))) /
+ (MODE_X_DIV * gd->baudrate);
}
#if !defined(CONFIG_SERIAL_MULTI)
}
snlen = strlen(sn);
if (snlen > sizeof(serial_number) - 1) {
- printf ("Warning: serial number %s is too long (%d > %d)\n",
- sn, snlen, sizeof(serial_number) - 1);
+ printf ("Warning: serial number %s is too long (%d > %lu)\n",
+ sn, snlen, (ulong)(sizeof(serial_number) - 1));
snlen = sizeof(serial_number) - 1;
}
memcpy (serial_number, sn, snlen);
} else if (node->nodetype == JFFS2_NODETYPE_CLEANMARKER) {
if (node->totlen != sizeof(struct jffs2_unknown_node))
printf("OOPS Cleanmarker has bad size "
- "%d != %u\n", node->totlen,
+ "%d != %zu\n",
+ node->totlen,
sizeof(struct jffs2_unknown_node));
} else if (node->nodetype == JFFS2_NODETYPE_PADDING) {
if (node->totlen < sizeof(struct jffs2_unknown_node))
printf("OOPS Padding has bad size "
- "%d < %u\n", node->totlen,
+ "%d < %zu\n",
+ node->totlen,
sizeof(struct jffs2_unknown_node));
} else {
- printf("Unknown node type: %x len %d "
- "offset 0x%x\n", node->nodetype,
+ printf("Unknown node type: %x len %d offset 0x%x\n",
+ node->nodetype,
node->totlen, offset);
}
offset += ((node->totlen + 3) & ~3);
} else if (node->nodetype == JFFS2_NODETYPE_CLEANMARKER) {
if (node->totlen != sizeof(struct jffs2_unknown_node))
printf("OOPS Cleanmarker has bad size "
- "%d != %d\n", node->totlen,
+ "%d != %zu\n",
+ node->totlen,
sizeof(struct jffs2_unknown_node));
} else if (node->nodetype == JFFS2_NODETYPE_PADDING) {
if (node->totlen < sizeof(struct jffs2_unknown_node))
printf("OOPS Padding has bad size "
- "%d < %d\n", node->totlen,
+ "%d < %zu\n",
+ node->totlen,
sizeof(struct jffs2_unknown_node));
} else {
- printf("Unknown node type: %x len %d "
- "offset 0x%x\n", node->nodetype,
+ printf("Unknown node type: %x len %d offset 0x%x\n",
+ node->nodetype,
node->totlen, offset);
}
offset += ((node->totlen + 3) & ~3);
/* e500 definitions */
#define SPRN_L1CFG0 0x203 /* L1 Cache Configuration Register 0 */
#define SPRN_L1CFG1 0x204 /* L1 Cache Configuration Register 1 */
+#define SPRN_L2CFG0 0x207 /* L2 Cache Configuration Register 0 */
#define SPRN_L1CSR0 0x3f2 /* L1 Data Cache Control and Status Register 0 */
#define L1CSR0_CPE 0x00010000 /* Data Cache Parity Enable */
#define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */
#define L1CSR1_CPE 0x00010000 /* Instruction Cache Parity Enable */
#define L1CSR1_ICFI 0x00000002 /* Instruction Cache Flash Invalidate */
#define L1CSR1_ICE 0x00000001 /* Instruction Cache Enable */
+#define SPRN_L1CSR2 0x25e /* L1 Data Cache Control and Status Register 2 */
+#define SPRN_L2CSR0 0x3f9 /* L2 Data Cache Control and Status Register 0 */
+#define L2CSR0_L2E 0x80000000 /* L2 Cache Enable */
+#define L2CSR0_L2PE 0x40000000 /* L2 Cache Parity/ECC Enable */
+#define L2CSR0_L2WP 0x1c000000 /* L2 I/D Way Partioning */
+#define L2CSR0_L2CM 0x03000000 /* L2 Cache Coherency Mode */
+#define L2CSR0_L2FI 0x00200000 /* L2 Cache Flash Invalidate */
+#define L2CSR0_L2IO 0x00100000 /* L2 Cache Instruction Only */
+#define L2CSR0_L2DO 0x00010000 /* L2 Cache Data Only */
+#define L2CSR0_L2REP 0x00003000 /* L2 Line Replacement Algo */
+#define L2CSR0_L2FL 0x00000800 /* L2 Cache Flush */
+#define L2CSR0_L2LFC 0x00000400 /* L2 Cache Lock Flash Clear */
+#define L2CSR0_L2LOA 0x00000080 /* L2 Cache Lock Overflow Allocate */
+#define L2CSR0_L2LO 0x00000020 /* L2 Cache Lock Overflow */
+#define SPRN_L2CSR1 0x3fa /* L2 Data Cache Control and Status Register 1 */
#define SPRN_MMUCSR0 0x3f4 /* MMU control and status register 0 */
#define SPRN_MAS0 0x270 /* MMU Assist Register 0 */
#define MCSRR1 SPRN_MCSRR1
#define L1CSR0 SPRN_L1CSR0
#define L1CSR1 SPRN_L1CSR1
+#define L1CSR2 SPRN_L1CSR2
#define L1CFG0 SPRN_L1CFG0
#define L1CFG1 SPRN_L1CFG1
+#define L2CFG0 SPRN_L2CFG0
+#define L2CSR0 SPRN_L2CSR0
+#define L2CSR1 SPRN_L2CSR1
#define MCSR SPRN_MCSR
#define MMUCSR0 SPRN_MMUCSR0
#define BUCSR SPRN_BUCSR
/* Some parts define SVR[0:23] as the SOC version */
#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFFFFF) /* SOC Version fields */
+/* whether MPC8xxxE (i.e. has SEC) */
+#if defined(CONFIG_MPC85xx)
+#define IS_E_PROCESSOR(svr) (svr & 0x80000)
+#else
+#if defined(CONFIG_MPC83XX)
+#define IS_E_PROCESSOR(spridr) (!(spridr & 0x00010000))
+#endif
+#endif
+
/*
* SVR_SOC_VER() Version Values
*/
*/
#define CFG_BOOT_BLOCK 0xfc000000 /* boot TLB */
-#define CFG_LBC_CACHE_BASE 0xf0000000 /* Localbus cacheable */
-
#define CFG_FLASH_BASE 0xff800000 /* start of FLASH 8M */
#define CFG_BR0_PRELIM 0xff801001
#define CFG_OR0_PRELIM 0xff806e65
#define CFG_OR1_PRELIM 0xff806e65
-#define CFG_FLASH_BANKS_LIST {0xfe800000,CFG_FLASH_BASE}
+#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE}
#define CFG_FLASH_QUIET_TEST
-#define CFG_MAX_FLASH_BANKS 2 /* number of banks */
+#define CFG_MAX_FLASH_BANKS 1 /* number of banks */
#define CFG_MAX_FLASH_SECT 128 /* sectors per device */
#undef CFG_FLASH_CHECKSUM
#define CFG_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
/* define to use L1 as initial stack */
-#define CONFIG_L1_INIT_RAM 1
-#define CFG_INIT_L1_LOCK 1
-#define CFG_INIT_L1_ADDR 0xf4010000 /* Initial L1 address */
-#define CFG_INIT_L1_END 0x00004000 /* End of used area in RAM */
-
-/* define to use L2SRAM as initial stack */
-#undef CONFIG_L2_INIT_RAM
-#define CFG_INIT_L2_ADDR 0xf8fc0000
-#define CFG_INIT_L2_END 0x00040000 /* End of used area in RAM */
-
-#ifdef CONFIG_L1_INIT_RAM
-#define CFG_INIT_RAM_ADDR CFG_INIT_L1_ADDR
-#define CFG_INIT_RAM_END CFG_INIT_L1_END
-#else
-#define CFG_INIT_RAM_ADDR CFG_INIT_L2_ADDR
-#define CFG_INIT_RAM_END CFG_INIT_L2_END
-#endif
+#define CONFIG_L1_INIT_RAM
+#define CFG_INIT_RAM_LOCK 1
+#define CFG_INIT_RAM_ADDR 0xf4010000 /* Initial L1 address */
+#define CFG_INIT_RAM_END 0x00004000 /* End of used area in RAM */
+
#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
-#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
+#define CFG_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
/* Serial Port - controlled on board with jumper J8
* open - index 2
#if defined(CONFIG_PCI)
+/*PCIE video card used*/
+#define VIDEO_IO_OFFSET CFG_PCIE2_IO_PHYS
+
+/*PCI video card used*/
+/*#define VIDEO_IO_OFFSET CFG_PCI1_IO_PHYS*/
+
+/* video */
+#define CONFIG_VIDEO
+
+#if defined(CONFIG_VIDEO)
+#define CONFIG_BIOSEMU
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO_SW_CURSOR
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_ATI_RADEON_FB
+#define CONFIG_VIDEO_LOGO
+/*#define CONFIG_CONSOLE_CURSOR*/
+#define CFG_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET
+#endif
+
#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
#if CFG_MONITOR_BASE > 0xfff80000
#define CFG_ENV_ADDR 0xfff80000
#else
-#define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000)
+#define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x70000)
#endif
#define CFG_ENV_SIZE 0x2000
#define CFG_ENV_SECT_SIZE 0x10000 /* 64K (one sector) */
#define CONFIG_BAUDRATE 115200
#define CONFIG_EXTRA_ENV_SETTINGS \
- "netdev=eth0\0" \
- "consoledev=ttyCPM\0" \
- "ramdiskaddr=1000000\0" \
- "ramdiskfile=your.ramdisk.u-boot\0" \
- "fdtaddr=400000\0" \
- "fdtfile=mpc8560ads.dtb\0"
+ "netdev=eth0\0" \
+ "consoledev=ttyCPM\0" \
+ "ramdiskaddr=1000000\0" \
+ "ramdiskfile=your.ramdisk.u-boot\0" \
+ "fdtaddr=400000\0" \
+ "fdtfile=mpc8560ads.dtb\0"
#define CONFIG_NFSBOOTCOMMAND \
- "setenv bootargs root=/dev/nfs rw " \
- "nfsroot=$serverip:$rootpath " \
- "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
- "console=$consoledev,$baudrate $othbootargs;" \
- "tftp $loadaddr $bootfile;" \
- "tftp $fdtaddr $fdtfile;" \
- "bootm $loadaddr - $fdtaddr"
+ "setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=$serverip:$rootpath " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr - $fdtaddr"
#define CONFIG_RAMBOOTCOMMAND \
- "setenv bootargs root=/dev/ram rw " \
- "console=$consoledev,$baudrate $othbootargs;" \
- "tftp $ramdiskaddr $ramdiskfile;" \
- "tftp $loadaddr $bootfile;" \
- "tftp $fdtaddr $fdtfile;" \
- "bootm $loadaddr $ramdiskaddr $fdtaddr"
+ "setenv bootargs root=/dev/ram rw " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $ramdiskaddr $ramdiskfile;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
#endif
#endif
-#define CFG_ID_EEPROM
-#ifdef CFG_ID_EEPROM
#define CONFIG_ID_EEPROM
-#endif
-#define ID_EEPROM_ADDR 0x57
+#define CFG_I2C_EEPROM_NXID
+#define CFG_ID_EEPROM
+#define CFG_I2C_EEPROM_ADDR 0x57
+#define CFG_I2C_EEPROM_ADDR_LEN 1
#define CFG_FLASH_BASE 0xf0000000 /* start of FLASH 128M */
#define CFG_DDR_CS5_BNDS 0x00000FFF /* Not done */
#endif
-#define CFG_ID_EEPROM 1
-#ifdef CFG_ID_EEPROM
#define CONFIG_ID_EEPROM
-#endif
-#define ID_EEPROM_ADDR 0x57
+#define CFG_I2C_EEPROM_NXID
+#define CFG_ID_EEPROM
+#define CFG_I2C_EEPROM_ADDR 0x57
+#define CFG_I2C_EEPROM_ADDR_LEN 1
/*
* In MPC8641HPCN, allocate 16MB flash spaces at fe000000 and ff000000.
--- /dev/null
+/*
+ * (C) Copyright 2003-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004-2008
+ * Matrix-Vision GmbH, andre.schwarz@matrix-vision.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <version.h>
+
+#define CONFIG_MPC5xxx 1
+#define CONFIG_MPC5200 1
+
+#define CFG_MPC5XXX_CLKIN 33000000
+
+#define BOOTFLAG_COLD 0x01
+#define BOOTFLAG_WARM 0x02
+
+#define CONFIG_MISC_INIT_R 1
+
+#define CFG_CACHELINE_SIZE 32
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CACHELINE_SHIFT 5
+#endif
+
+#define CONFIG_PSC_CONSOLE 1
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200, 230400}
+
+#define CONFIG_PCI 1
+#define CONFIG_PCI_PNP 1
+#undef CONFIG_PCI_SCAN_SHOW
+#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
+
+#define CONFIG_PCI_MEM_BUS 0x40000000
+#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE 0x10000000
+
+#define CONFIG_PCI_IO_BUS 0x50000000
+#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE 0x01000000
+
+#define CFG_XLB_PIPELINING 1
+#define CONFIG_HIGH_BATS 1
+
+#define MV_CI mvBlueCOUGAR-P
+#define MV_VCI mvBlueCOUGAR-P
+#define MV_FPGA_DATA 0xff860000
+#define MV_FPGA_SIZE 0x0003c886
+#define MV_KERNEL_ADDR 0xffc00000
+#define MV_INITRD_ADDR 0xff900000
+#define MV_INITRD_LENGTH 0x00300000
+#define MV_SCRATCH_ADDR 0x00000000
+#define MV_SCRATCH_LENGTH MV_INITRD_LENGTH
+#define MV_AUTOSCR_ADDR 0xff840000
+#define MV_AUTOSCR_ADDR2 0xff850000
+#define MV_DTB_ADDR 0xfffc0000
+
+#define CONFIG_SHOW_BOOT_PROGRESS 1
+
+#define MV_KERNEL_ADDR_RAM 0x00100000
+#define MV_DTB_ADDR_RAM 0x00600000
+#define MV_INITRD_ADDR_RAM 0x01000000
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+
+#define OF_CPU "PowerPC,5200@0"
+#define OF_SOC "soc5200@f0000000"
+#define OF_TBCLK (bd->bi_busfreq / 4)
+#define MV_DTB_NAME mvbc-p.dtb
+#define CONFIG_OF_STDOUT_VIA_ALIAS 1
+
+/*
+ * Supported commands
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_FPGA
+
+#undef CONFIG_WATCHDOG
+
+#define CONFIG_BOOTP_VENDOREX
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_NTPSERVER
+#define CONFIG_BOOTP_RANDOM_DELAY
+#define CONFIG_BOOTP_SEND_HOSTNAME
+
+/*
+ * Autoboot
+ */
+#define CONFIG_BOOTDELAY 2
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_STOP_STR "s"
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+#define CONFIG_RESET_TO_RETRY 1000
+
+#define CONFIG_BOOTCOMMAND "if imi ${autoscr_addr}; \
+ then autoscr ${autoscr_addr}; \
+ else autoscr ${autoscr_addr2}; \
+ fi;"
+
+#define CONFIG_BOOTARGS "root=/dev/ram ro rootfstype=squashfs"
+#define CONFIG_ENV_OVERWRITE
+
+#define XMK_STR(x) #x
+#define MK_STR(x) XMK_STR(x)
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "console_nr=0\0" \
+ "console=yes\0" \
+ "stdin=serial\0" \
+ "stdout=serial\0" \
+ "stderr=serial\0" \
+ "fpga=0\0" \
+ "fpgadata=" MK_STR(MV_FPGA_DATA) "\0" \
+ "fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0" \
+ "autoscr_addr=" MK_STR(MV_AUTOSCR_ADDR) "\0" \
+ "autoscr_addr2=" MK_STR(MV_AUTOSCR_ADDR2) "\0" \
+ "mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0" \
+ "mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0" \
+ "mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0" \
+ "mv_initrd_addr_ram=" MK_STR(MV_INITRD_ADDR_RAM) "\0" \
+ "mv_initrd_length=" MK_STR(MV_INITRD_LENGTH) "\0" \
+ "mv_dtb_addr=" MK_STR(MV_DTB_ADDR) "\0" \
+ "mv_dtb_addr_ram=" MK_STR(MV_DTB_ADDR_RAM) "\0" \
+ "dtb_name=" MK_STR(MV_DTB_NAME) "\0" \
+ "mv_scratch_addr=" MK_STR(MV_SCRATCH_ADDR) "\0" \
+ "mv_scratch_length=" MK_STR(MV_SCRATCH_LENGTH) "\0" \
+ "mv_version=" U_BOOT_VERSION "\0" \
+ "dhcp_client_id=" MK_STR(MV_CI) "\0" \
+ "dhcp_vendor-class-identifier=" MK_STR(MV_VCI) "\0" \
+ "netretry=no\0" \
+ "use_static_ipaddr=no\0" \
+ "static_ipaddr=192.168.90.10\0" \
+ "static_netmask=255.255.255.0\0" \
+ "static_gateway=0.0.0.0\0" \
+ "initrd_name=uInitrd.mvbc-p-rfs\0" \
+ "zcip=no\0" \
+ "netboot=yes\0" \
+ "mvtest=Ff\0" \
+ "tried_bootfromflash=no\0" \
+ "tried_bootfromnet=no\0" \
+ "use_dhcp=yes\0" \
+ "gev_start=yes\0" \
+ "mvbcdma_debug=0\0" \
+ "mvbcia_debug=0\0" \
+ "propdev_debug=0\0" \
+ "gevss_debug=0\0" \
+ "watchdog=1\0" \
+ ""
+
+#undef XMK_STR
+#undef MK_STR
+
+/*
+ * IPB Bus clocking configuration.
+ */
+#define CFG_IPBCLK_EQUALS_XLBCLK
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2
+
+/*
+ * Flash configuration
+ */
+#undef CONFIG_FLASH_16BIT
+#define CFG_FLASH_CFI
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_FLASH_CFI_AMD_RESET 1
+#define CFG_FLASH_EMPTY_INFO
+
+#define CFG_FLASH_ERASE_TOUT 50000
+#define CFG_FLASH_WRITE_TOUT 1000
+
+#define CFG_MAX_FLASH_BANKS 1
+#define CFG_MAX_FLASH_SECT 256
+
+#define CFG_LOWBOOT
+#define CFG_FLASH_BASE TEXT_BASE
+#define CFG_FLASH_SIZE 0x00800000
+
+/*
+ * Environment settings
+ */
+#define CFG_ENV_IS_IN_FLASH
+#undef CFG_FLASH_PROTECTION
+
+#define CFG_ENV_ADDR 0xFFFE0000
+#define CFG_ENV_SIZE 0x10000
+#define CFG_ENV_SECT_SIZE 0x10000
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR+CFG_ENV_SIZE)
+#define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE
+
+/*
+ * Memory map
+ */
+#define CFG_MBAR 0xF0000000
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_DEFAULT_MBAR 0x80000000
+
+#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
+#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
+
+#define CFG_GBL_DATA_SIZE 128
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+#define CFG_RAMBOOT 1
+#endif
+
+/* CFG_MONITOR_LEN must be a multiple of CFG_ENV_SECT_SIZE */
+#define CFG_MONITOR_LEN (512 << 10)
+#define CFG_MALLOC_LEN (512 << 10)
+#define CFG_BOOTMAPSZ (8 << 20)
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_NET_MULTI
+#define CONFIG_NET_RETRY_COUNT 5
+
+#define CONFIG_E1000
+#define CONFIG_E1000_FALLBACK_MAC 0xb6b445ebfbc0
+#undef CONFIG_MPC5xxx_FEC
+#undef CONFIG_PHY_ADDR
+#define CONFIG_NETDEV eth0
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_HUSH_PARSER
+#define CONFIG_CMDLINE_EDITING
+#define CFG_PROMPT_HUSH_PS2 "> "
+#undef CFG_LONGHELP
+#define CFG_PROMPT "=> "
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024
+#else
+#define CFG_CBSIZE 256
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
+#define CFG_MAXARGS 16
+#define CFG_BARGSIZE CFG_CBSIZE
+
+#define CFG_MEMTEST_START 0x00800000
+#define CFG_MEMTEST_END 0x02f00000
+
+#define CFG_HZ 1000
+
+/* default load address */
+#define CFG_LOAD_ADDR 0x02000000
+/* default location for tftp and bootm */
+#define CONFIG_LOADADDR 0x00200000
+
+/*
+ * Various low-level settings
+ */
+#define CFG_GPS_PORT_CONFIG 0x20000004
+
+#define CFG_HID0_INIT (HID0_ICE | HID0_ICFI)
+#define CFG_HID0_FINAL HID0_ICE
+
+#define CFG_BOOTCS_START CFG_FLASH_BASE
+#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
+#define CFG_BOOTCS_CFG 0x00047800
+#define CFG_CS0_START CFG_FLASH_BASE
+#define CFG_CS0_SIZE CFG_FLASH_SIZE
+
+#define CFG_CS_BURST 0x000000f0
+#define CFG_CS_DEADCYCLE 0x33333303
+
+#define CFG_RESET_ADDRESS 0x00000100
+
+#undef FPGA_DEBUG
+#undef CFG_FPGA_PROG_FEEDBACK
+#define CONFIG_FPGA CFG_ALTERA_CYCLON2
+#define CONFIG_FPGA_ALTERA 1
+#define CONFIG_FPGA_CYCLON2 1
+#define CONFIG_FPGA_COUNT 1
+
+#endif
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTCOMMAND "bootm 40000"
#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
-#define CONFIG_CMDLINE_TAG
+
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_SETUP_MEMORY_TAGS 1
+/* #define CONFIG_INITRD_TAG 1 */
/*
* Current memory map for Vibren supplied Linux images:
/* "protect off" */
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-/* #define CONFIG_INITRD_TAG 1 */
-
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
* MA 02111-1307 USA
*/
-/* mpc8560ads board configuration file */
-/* please refer to doc/README.mpc85xx for more info */
+/* sbc8560 board configuration file */
+/* please refer to doc/README.sbc8560 for more info */
/* make sure you change the MAC address and other network params first,
* search for CONFIG_ETHADDR,CONFIG_SERVERIP,etc in this file
*/
#define CFG_SDRAM_SIZE 512 /* DDR is 512MB */
#define SPD_EEPROM_ADDRESS 0x55 /* DDR DIMM */
-#undef CONFIG_DDR_ECC /* only for ECC DDR module */
-#undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
+#undef CONFIG_DDR_ECC /* only for ECC DDR module */
+#undef CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
#if defined(CONFIG_MPC85xx_REV1)
- #define CONFIG_DDR_DLL /* possible DLL fix needed */
+ #define CONFIG_DDR_DLL /* possible DLL fix needed */
#endif
#undef CONFIG_CLOCKS_IN_MHZ
#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
/* Serial Port */
-#undef CONFIG_CONS_ON_SCC /* define if console on SCC */
-#undef CONFIG_CONS_NONE /* define if console on something else */
+#undef CONFIG_CONS_ON_SCC /* define if console on SCC */
+#undef CONFIG_CONS_NONE /* define if console on something else */
#define CONFIG_CONS_INDEX 1
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define CONFIG_OF_STDOUT_VIA_ALIAS 1
+
/*
* I2C
*/
#define CFG_PCI_MEM_PHYS 0xC0000000
#define CFG_PCI_MEM_SIZE 0x10000000
-#if defined(CONFIG_TSEC_ENET) /* TSEC Ethernet port */
+#ifdef CONFIG_TSEC_ENET
+
+#ifndef CONFIG_NET_MULTI
+#define CONFIG_NET_MULTI 1
+#endif
-# define CONFIG_NET_MULTI 1
-# define CONFIG_MII 1 /* MII PHY management */
-# define CONFIG_MPC85xx_TSEC1
-# define CONFIG_MPC85xx_TSEC1_NAME "TSEC0"
-# define TSEC1_PHY_ADDR 25
-# define TSEC1_PHYIDX 0
-/* Options are: TSEC0 */
-# define CONFIG_ETHPRIME "TSEC0"
+#ifndef CONFIG_MII
+#define CONFIG_MII 1 /* MII PHY management */
+#endif
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
+#define TSEC1_PHY_ADDR 0x19
+#define TSEC2_PHY_ADDR 0x1a
+#define TSEC1_PHYIDX 0
+#define TSEC2_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
+
+/* Options are: TSEC[0-1] */
+#define CONFIG_ETHPRIME "TSEC0"
#elif defined(CONFIG_ETHER_ON_FCC) /* CPM FCC Ethernet */
* FLASH and environment organization
*/
-#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
-#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
+#define CFG_FLASH_CFI 1 /* Flash is CFI conformant */
+#define CFG_FLASH_CFI_DRIVER 1 /* Use the common driver */
#if 0
-#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
-#define CFG_FLASH_PROTECTION /* use hardware protection */
+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
+#define CFG_FLASH_PROTECTION /* use hardware protection */
#endif
-#define CFG_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
-#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#undef CFG_FLASH_CHECKSUM
-#define CFG_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */
-#define CFG_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */
+#define CFG_FLASH_ERASE_TOUT 200000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 50000 /* Timeout for Flash Write (in ms) */
-#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
#if 0
/* XXX This doesn't work and I don't want to fix it */
#define CFG_ENV_SIZE 0x2000
#endif
-#define CONFIG_BOOTARGS "root=/dev/nfs rw nfsroot=192.168.0.251:/tftpboot ip=192.168.0.105:192.168.0.251::255.255.255.0:sbc8560:eth0:off console=ttyS0,9600"
+#define CONFIG_BOOTARGS "root=/dev/nfs rw ip=dhcp console=ttyS0,9600"
/*#define CONFIG_BOOTARGS "root=/dev/ram rw console=ttyS0,115200"*/
-#define CONFIG_BOOTCOMMAND "bootm 0xff800000 0xffa00000"
#define CONFIG_BOOTDELAY 5 /* -1 disable autoboot */
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
- #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
- #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
-/*Note: change below for your network setting!!! */
#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
-# define CONFIG_ETHADDR 00:01:af:07:9b:8a
-# define CONFIG_HAS_ETH1
-# define CONFIG_ETH1ADDR 00:01:af:07:9b:8b
-# define CONFIG_HAS_ETH2
-# define CONFIG_ETH2ADDR 00:01:af:07:9b:8c
+#define CONFIG_HAS_ETH0
+#define CONFIG_HAS_ETH1
#endif
-#define CONFIG_SERVERIP 192.168.0.131
-#define CONFIG_IPADDR 192.168.0.105
-#define CONFIG_GATEWAYIP 0.0.0.0
-#define CONFIG_NETMASK 255.255.255.0
+/* You can compile in a MAC address and your custom net settings by using
+ * the following syntax. Your board should be marked with the assigned
+ * MAC addresses directly on it.
+ *
+ * #define CONFIG_ETHADDR de:ad:be:ef:00:00
+ * #define CONFIG_ETH1ADDR fa:ke:ad:dr:es:s!
+ * #define CONFIG_SERVERIP <server ip>
+ * #define CONFIG_IPADDR <board ip>
+ * #define CONFIG_GATEWAYIP <gateway ip>
+ * #define CONFIG_NETMASK <your netmask>
+ */
+
#define CONFIG_HOSTNAME SBC8560
#define CONFIG_ROOTPATH /home/ppc
-#define CONFIG_BOOTFILE pImage
+#define CONFIG_BOOTFILE uImage
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "consoledev=ttyS0\0" \
+ "ramdiskaddr=2000000\0" \
+ "ramdiskfile=ramdisk.uboot\0" \
+ "fdtaddr=c00000\0" \
+ "fdtfile=sbc8560.dtb\0"
+
+#define CONFIG_NFSBOOTCOMMAND \
+ "setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=$serverip:$rootpath " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr - $fdtaddr"
+
+
+#define CONFIG_RAMBOOTCOMMAND \
+ "setenv bootargs root=/dev/ram rw " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $ramdiskaddr $ramdiskfile;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
+
+#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
#endif /* __CONFIG_H */
static inline void fdt_fixup_dr_usb(void *blob, bd_t *bd) {}
#endif /* CONFIG_HAS_FSL_DR_USB */
+#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC83XX)
+void fdt_fixup_crypto_node(void *blob, int sec_rev);
+#else
+static inline void fdt_fixup_crypto_node(void *blob, int sec_rev) {}
+#endif
+
#ifdef CONFIG_OF_BOARD_SETUP
void ft_board_setup(void *blob, bd_t *bd);
void ft_cpu_setup(void *blob, bd_t *bd);
#define GPIO_PSC3_9 0x04000000UL
#define GPIO_PSC1_4 0x01000000UL
+#define MPC5XXX_GPIO_SIMPLE_PSC6_3 0x20000000UL
+#define MPC5XXX_GPIO_SIMPLE_PSC6_2 0x10000000UL
+#define MPC5XXX_GPIO_SIMPLE_PSC3_7 0x00002000UL
+#define MPC5XXX_GPIO_SIMPLE_PSC3_6 0x00001000UL
+#define MPC5XXX_GPIO_SIMPLE_PSC3_3 0x00000800UL
+#define MPC5XXX_GPIO_SIMPLE_PSC3_2 0x00000400UL
+#define MPC5XXX_GPIO_SIMPLE_PSC3_1 0x00000200UL
+#define MPC5XXX_GPIO_SIMPLE_PSC3_0 0x00000100UL
+#define MPC5XXX_GPIO_SIMPLE_PSC2_3 0x00000080UL
+#define MPC5XXX_GPIO_SIMPLE_PSC2_2 0x00000040UL
+#define MPC5XXX_GPIO_SIMPLE_PSC2_1 0x00000020UL
+#define MPC5XXX_GPIO_SIMPLE_PSC2_0 0x00000010UL
+#define MPC5XXX_GPIO_SIMPLE_PSC1_3 0x00000008UL
+#define MPC5XXX_GPIO_SIMPLE_PSC1_2 0x00000004UL
+#define MPC5XXX_GPIO_SIMPLE_PSC1_1 0x00000002UL
+#define MPC5XXX_GPIO_SIMPLE_PSC1_0 0x00000001UL
+
+#define MPC5XXX_GPIO_SINT_PSC3_5 0x02
+#define MPC5XXX_GPIO_SINT_PSC3_4 0x01
+
+#define MPC5XXX_GPIO_WKUP_7 0x80
+#define MPC5XXX_GPIO_WKUP_6 0x40
+#define MPC5XXX_GPIO_WKUP_PSC6_1 0x20
+#define MPC5XXX_GPIO_WKUP_PSC6_0 0x10
+#define MPC5XXX_GPIO_WKUP_ETH17 0x08
+#define MPC5XXX_GPIO_WKUP_PSC3_9 0x04
+#define MPC5XXX_GPIO_WKUP_PSC2_4 0x02
+#define MPC5XXX_GPIO_WKUP_PSC1_4 0x01
+
/* PCI registers */
#define MPC5XXX_PCI_CMD (MPC5XXX_PCI + 0x04)
#define MPC5XXX_PCI_CFG (MPC5XXX_PCI + 0x0c)
#endif
#define PARTID_NO_E(spridr) ((spridr & 0xFFFE0000) >> 16)
-#define IS_E_PROCESSOR(spridr) (!(spridr & 0x00010000)) /* has SEC */
+#define SPR_FAMILY(spridr) ((spridr & 0xFFF00000) >> 20)
+#define SPR_831X_FAMILY 0x80B
#define SPR_8311 0x80B2
#define SPR_8313 0x80B0
#define SPR_8314 0x80B6
#define SPR_8315 0x80B4
+#define SPR_832X_FAMILY 0x806
#define SPR_8321 0x8066
#define SPR_8323 0x8062
+#define SPR_834X_FAMILY 0x803
#define SPR_8343 0x8036
#define SPR_8347_TBGA_ 0x8032
#define SPR_8347_PBGA_ 0x8034
#define SPR_8349 0x8030
+#define SPR_836X_FAMILY 0x804
#define SPR_8358_TBGA_ 0x804A
#define SPR_8358_PBGA_ 0x804E
#define SPR_8360 0x8048
+#define SPR_837X_FAMILY 0x80C
#define SPR_8377 0x80C6
#define SPR_8378 0x80C4
#define SPR_8379 0x80C2
/* get the conversion qualifier */
qualifier = -1;
- if (*fmt == 'h' || *fmt == 'l' || *fmt == 'q') {
+ if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L' ||
+ *fmt == 'Z' || *fmt == 'z' || *fmt == 't' ||
+ *fmt == 'q' ) {
qualifier = *fmt;
if (qualifier == 'l' && *(fmt+1) == 'l') {
qualifier = 'q';
num = va_arg(args, unsigned long long);
else
#endif
- if (qualifier == 'l')
+ if (qualifier == 'l') {
num = va_arg(args, unsigned long);
- else if (qualifier == 'h') {
+ } else if (qualifier == 'Z' || qualifier == 'z') {
+ num = va_arg(args, size_t);
+ } else if (qualifier == 't') {
+ num = va_arg(args, ptrdiff_t);
+ } else if (qualifier == 'h') {
num = (unsigned short) va_arg(args, int);
if (flags & SIGN)
num = (short) num;
addr_sp -= sizeof (bd_t);
bd = (bd_t *) addr_sp;
gd->bd = bd;
- debug ("Reserving %d Bytes for Board Info at: %08lx\n",
+ debug ("Reserving %zu Bytes for Board Info at: %08lx\n",
sizeof (bd_t), addr_sp);
addr_sp -= sizeof (gd_t);
id = (gd_t *) addr_sp;
- debug ("Reserving %d Bytes for Global Data at: %08lx\n",
+ debug ("Reserving %zu Bytes for Global Data at: %08lx\n",
sizeof (gd_t), addr_sp);
/* Reserve memory for boot params. */
addr_sp -= sizeof(bd_t);
bd = (bd_t *)addr_sp;
gd->bd = bd;
- debug ("Reserving %d Bytes for Board Info at: %08lx\n",
+ debug ("Reserving %zu Bytes for Board Info at: %08lx\n",
sizeof(bd_t), addr_sp);
addr_sp -= sizeof(gd_t);
id = (gd_t *)addr_sp;
- debug ("Reserving %d Bytes for Global Data at: %08lx\n",
+ debug ("Reserving %zu Bytes for Global Data at: %08lx\n",
sizeof (gd_t), addr_sp);
/* Reserve memory for boot params.
char *commandline = getenv ("bootargs");
char env_buf[12];
int ret;
- const char *cp;
+ char *cp;
/* find kernel entry point */
if (images->legacy_hdr_valid) {
linux_params_init (UNCACHED_SDRAM (gd->bd->bi_boot_params), commandline);
#ifdef CONFIG_MEMSIZE_IN_BYTES
- sprintf (env_buf, "%lu", gd->ram_size);
-#ifdef DEBUG
- printf ("## Giving linux memsize in bytes, %lu\n", gd->ram_size);
-#endif
+ sprintf (env_buf, "%lu", (ulong)gd->ram_size);
+ debug ("## Giving linux memsize in bytes, %lu\n", (ulong)gd->ram_size);
#else
- sprintf (env_buf, "%lu", gd->ram_size >> 20);
-#ifdef DEBUG
- printf ("## Giving linux memsize in MB, %lu\n", gd->ram_size >> 20);
-#endif
+ sprintf (env_buf, "%lu", (ulong)(gd->ram_size >> 20));
+ debug ("## Giving linux memsize in MB, %lu\n", (ulong)(gd->ram_size >> 20));
#endif /* CONFIG_MEMSIZE_IN_BYTES */
linux_env_set ("memsize", env_buf);
addr_sp -= sizeof (bd_t);
bd = (bd_t *) addr_sp;
gd->bd = bd;
- debug ("Reserving %d Bytes for Board Info at: %08lx\n",
+ debug ("Reserving %zu Bytes for Board Info at: %08lx\n",
sizeof (bd_t), addr_sp);
addr_sp -= sizeof (gd_t);
id = (gd_t *) addr_sp;
- debug ("Reserving %d Bytes for Global Data at: %08lx\n",
+ debug ("Reserving %zu Bytes for Global Data at: %08lx\n",
sizeof (gd_t), addr_sp);
/*
Bootp_t *bp;
char *s;
- debug ("got BOOTP packet (src=%d, dst=%d, len=%d want_len=%d)\n",
+ debug ("got BOOTP packet (src=%d, dst=%d, len=%d want_len=%zu)\n",
src, dest, len, sizeof (Bootp_t));
bp = (Bootp_t *)pkt;
if (NetReadLong((ulong*)&bp->bp_vend[0]) == htonl(BOOTP_VENDOR_MAGIC))
DhcpOptionsProcess((u8 *)&bp->bp_vend[4], bp);
- BootpCopyNetParams(bp); /* Store net params from reply */
-
NetSetTimeout(TIMEOUT * CFG_HZ, BootpTimeout);
DhcpSendRequestPkt(bp);
#ifdef CFG_BOOTFILE_PREFIX
#if defined(CONFIG_MCF52x2)
mcf52x2_miiphy_initialize(bis);
#endif
-#if defined(CONFIG_NETARM)
+#if defined(CONFIG_DRIVER_NS7520_ETHERNET)
ns7520_miiphy_initialize(bis);
#endif
#if defined(CONFIG_DRIVER_TI_EMAC)
puts ("Got IP\n");
#endif
if (len < IP_HDR_SIZE) {
- debug ("len bad %d < %ld\n", len, IP_HDR_SIZE);
+ debug ("len bad %d < %lu\n", len, (ulong)IP_HDR_SIZE);
return;
}
if (len < ntohs(ip->ip_len)) {
/img2srec
/md5.c
/mkimage
+/mpc86x_clk
+/ncp
/sha1.c
/ubsha1
+/inca-swap-bytes
/image.c
/fdt.c
/fdt_ro.c
erased = 0;
- for (bank=0,info=&flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
+ for (bank=0,info = &flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
ulong b_end;
int sect;
protected = 0;
- for (bank=0,info=&flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
+ for (bank=0,info = &flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
ulong b_end;
int sect;
flash_info_t *info;
int i;
- for (i=0, info=&flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
+ for (i=0, info = &flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
if (info->flash_id != FLASH_UNKNOWN &&
addr >= info->start[0] &&
/* WARNING - The '- 1' is needed if the flash
projects / u-boot / commitdiff