]> git.sur5r.net Git - u-boot/commitdiff
imx: cpu: move speed/temp to common cpu
authorPeng Fan <peng.fan@nxp.com>
Wed, 10 Jan 2018 05:20:29 +0000 (13:20 +0800)
committerStefano Babic <sbabic@denx.de>
Sun, 4 Feb 2018 11:00:58 +0000 (12:00 +0100)
The i.MX7 cpu speed/temp code could be reused on i.MX8M,
so move them to common cpu code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
arch/arm/mach-imx/cpu.c
arch/arm/mach-imx/mx7/soc.c

index fae8b0a4197aa0a6bb275d98da9a2f67fffe41b5..52dbafb50cec8b3e5bc7a123fe595cd9632a2b15 100644 (file)
@@ -333,6 +333,79 @@ void set_chipselect_size(int const cs_size)
 }
 #endif
 
+#if defined(CONFIG_MX7)
+/*
+ * OCOTP_TESTER3[9:8] (see Fusemap Description Table offset 0x440)
+ * defines a 2-bit SPEED_GRADING
+ */
+#define OCOTP_TESTER3_SPEED_SHIFT      8
+#define OCOTP_TESTER3_SPEED_800MHZ     0
+#define OCOTP_TESTER3_SPEED_500MHZ     1
+#define OCOTP_TESTER3_SPEED_1GHZ       2
+#define OCOTP_TESTER3_SPEED_1P2GHZ     3
+
+u32 get_cpu_speed_grade_hz(void)
+{
+       struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+       struct fuse_bank *bank = &ocotp->bank[1];
+       struct fuse_bank1_regs *fuse =
+               (struct fuse_bank1_regs *)bank->fuse_regs;
+       uint32_t val;
+
+       val = readl(&fuse->tester3);
+       val >>= OCOTP_TESTER3_SPEED_SHIFT;
+       val &= 0x3;
+
+       switch(val) {
+       case OCOTP_TESTER3_SPEED_800MHZ:
+               return 800000000;
+       case OCOTP_TESTER3_SPEED_500MHZ:
+               return 500000000;
+       case OCOTP_TESTER3_SPEED_1GHZ:
+               return 1000000000;
+       case OCOTP_TESTER3_SPEED_1P2GHZ:
+               return 1200000000;
+       }
+       return 0;
+}
+
+/*
+ * OCOTP_TESTER3[7:6] (see Fusemap Description Table offset 0x440)
+ * defines a 2-bit SPEED_GRADING
+ */
+#define OCOTP_TESTER3_TEMP_SHIFT       6
+
+u32 get_cpu_temp_grade(int *minc, int *maxc)
+{
+       struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+       struct fuse_bank *bank = &ocotp->bank[1];
+       struct fuse_bank1_regs *fuse =
+               (struct fuse_bank1_regs *)bank->fuse_regs;
+       uint32_t val;
+
+       val = readl(&fuse->tester3);
+       val >>= OCOTP_TESTER3_TEMP_SHIFT;
+       val &= 0x3;
+
+       if (minc && maxc) {
+               if (val == TEMP_AUTOMOTIVE) {
+                       *minc = -40;
+                       *maxc = 125;
+               } else if (val == TEMP_INDUSTRIAL) {
+                       *minc = -40;
+                       *maxc = 105;
+               } else if (val == TEMP_EXTCOMMERCIAL) {
+                       *minc = -20;
+                       *maxc = 105;
+               } else {
+                       *minc = 0;
+                       *maxc = 95;
+               }
+       }
+       return val;
+}
+#endif
+
 #ifdef CONFIG_NXP_BOARD_REVISION
 int nxp_board_rev(void)
 {
index d160e80146dc925b0ce4c4799c53c9970e06888c..032dfcf2ce9aec589022279df23dc9cbcc896a12 100644 (file)
@@ -97,77 +97,6 @@ struct imx_sec_config_fuse_t const imx_sec_config_fuse = {
 };
 #endif
 
-/*
- * OCOTP_TESTER3[9:8] (see Fusemap Description Table offset 0x440)
- * defines a 2-bit SPEED_GRADING
- */
-#define OCOTP_TESTER3_SPEED_SHIFT      8
-#define OCOTP_TESTER3_SPEED_800MHZ     0
-#define OCOTP_TESTER3_SPEED_500MHZ     1
-#define OCOTP_TESTER3_SPEED_1GHZ       2
-#define OCOTP_TESTER3_SPEED_1P2GHZ     3
-
-u32 get_cpu_speed_grade_hz(void)
-{
-       struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
-       struct fuse_bank *bank = &ocotp->bank[1];
-       struct fuse_bank1_regs *fuse =
-               (struct fuse_bank1_regs *)bank->fuse_regs;
-       uint32_t val;
-
-       val = readl(&fuse->tester3);
-       val >>= OCOTP_TESTER3_SPEED_SHIFT;
-       val &= 0x3;
-
-       switch(val) {
-       case OCOTP_TESTER3_SPEED_800MHZ:
-               return 800000000;
-       case OCOTP_TESTER3_SPEED_500MHZ:
-               return 500000000;
-       case OCOTP_TESTER3_SPEED_1GHZ:
-               return 1000000000;
-       case OCOTP_TESTER3_SPEED_1P2GHZ:
-               return 1200000000;
-       }
-       return 0;
-}
-
-/*
- * OCOTP_TESTER3[7:6] (see Fusemap Description Table offset 0x440)
- * defines a 2-bit SPEED_GRADING
- */
-#define OCOTP_TESTER3_TEMP_SHIFT       6
-
-u32 get_cpu_temp_grade(int *minc, int *maxc)
-{
-       struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
-       struct fuse_bank *bank = &ocotp->bank[1];
-       struct fuse_bank1_regs *fuse =
-               (struct fuse_bank1_regs *)bank->fuse_regs;
-       uint32_t val;
-
-       val = readl(&fuse->tester3);
-       val >>= OCOTP_TESTER3_TEMP_SHIFT;
-       val &= 0x3;
-
-       if (minc && maxc) {
-               if (val == TEMP_AUTOMOTIVE) {
-                       *minc = -40;
-                       *maxc = 125;
-               } else if (val == TEMP_INDUSTRIAL) {
-                       *minc = -40;
-                       *maxc = 105;
-               } else if (val == TEMP_EXTCOMMERCIAL) {
-                       *minc = -20;
-                       *maxc = 105;
-               } else {
-                       *minc = 0;
-                       *maxc = 95;
-               }
-       }
-       return val;
-}
-
 static bool is_mx7d(void)
 {
        struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;