]> git.sur5r.net Git - u-boot/commitdiff
mtd: nand: add common DT init code
authorBrian Norris <computersforpeace@gmail.com>
Wed, 15 Jun 2016 19:09:22 +0000 (21:09 +0200)
committerScott Wood <oss@buserror.net>
Mon, 25 Jul 2016 01:36:28 +0000 (20:36 -0500)
These are already-documented common bindings for NAND chips. Let's
handle them in nand_base.

If NAND controller drivers need to act on this data before bringing up
the NAND chip (e.g., fill out ECC callback functions, change HW modes,
etc.), then they can do so between calling nand_scan_ident() and
nand_scan_tail().

The original commit has been slightly reworked to use the fdtdec_xxx()
helpers (instead of the of_xxxx() ones).

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
drivers/mtd/nand/nand_base.c
include/linux/mtd/nand.h

index 689716753ae646f35ba697367314a7f6b0bf4001..4cf45189896c6004761a877e08944ab375a9784d 100644 (file)
@@ -29,6 +29,9 @@
 
 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 #include <common.h>
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+#include <fdtdec.h>
+#endif
 #include <malloc.h>
 #include <watchdog.h>
 #include <linux/err.h>
@@ -3763,6 +3766,66 @@ ident_done:
        return type;
 }
 
+#if CONFIG_IS_ENABLED(OF_CONTROL)
+DECLARE_GLOBAL_DATA_PTR;
+
+static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node)
+{
+       int ret, ecc_mode = -1, ecc_strength, ecc_step;
+       const void *blob = gd->fdt_blob;
+       const char *str;
+
+       ret = fdtdec_get_int(blob, node, "nand-bus-width", -1);
+       if (ret == 16)
+               chip->options |= NAND_BUSWIDTH_16;
+
+       if (fdtdec_get_bool(blob, node, "nand-on-flash-bbt"))
+               chip->bbt_options |= NAND_BBT_USE_FLASH;
+
+       str = fdt_getprop(blob, node, "nand-ecc-mode", NULL);
+       if (str) {
+               if (!strcmp(str, "none"))
+                       ecc_mode = NAND_ECC_NONE;
+               else if (!strcmp(str, "soft"))
+                       ecc_mode = NAND_ECC_SOFT;
+               else if (!strcmp(str, "hw"))
+                       ecc_mode = NAND_ECC_HW;
+               else if (!strcmp(str, "hw_syndrome"))
+                       ecc_mode = NAND_ECC_HW_SYNDROME;
+               else if (!strcmp(str, "hw_oob_first"))
+                       ecc_mode = NAND_ECC_HW_OOB_FIRST;
+               else if (!strcmp(str, "soft_bch"))
+                       ecc_mode = NAND_ECC_SOFT_BCH;
+       }
+
+
+       ecc_strength = fdtdec_get_int(blob, node, "nand-ecc-strength", -1);
+       ecc_step = fdtdec_get_int(blob, node, "nand-ecc-step-size", -1);
+
+       if ((ecc_step >= 0 && !(ecc_strength >= 0)) ||
+           (!(ecc_step >= 0) && ecc_strength >= 0)) {
+               pr_err("must set both strength and step size in DT\n");
+               return -EINVAL;
+       }
+
+       if (ecc_mode >= 0)
+               chip->ecc.mode = ecc_mode;
+
+       if (ecc_strength >= 0)
+               chip->ecc.strength = ecc_strength;
+
+       if (ecc_step > 0)
+               chip->ecc.size = ecc_step;
+
+       return 0;
+}
+#else
+static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node)
+{
+       return 0;
+}
+#endif /* CONFIG_IS_ENABLED(OF_CONTROL) */
+
 /**
  * nand_scan_ident - [NAND Interface] Scan for the NAND device
  * @mtd: MTD device structure
@@ -3779,6 +3842,13 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips,
        int i, nand_maf_id, nand_dev_id;
        struct nand_chip *chip = mtd_to_nand(mtd);
        struct nand_flash_dev *type;
+       int ret;
+
+       if (chip->flash_node) {
+               ret = nand_dt_init(mtd, chip, chip->flash_node);
+               if (ret)
+                       return ret;
+       }
 
        /* Set the default functions */
        nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16);
index b5a02c3382cacf0b24c8bdcf05141f6d632e3dc6..29aae43cf2c323590dbdccc9367d680c6d3e3ead 100644 (file)
@@ -590,6 +590,7 @@ struct nand_buffers {
  *                     flash device
  * @IO_ADDR_W:         [BOARDSPECIFIC] address to write the 8 I/O lines of the
  *                     flash device.
+ * @flash_node:                [BOARDSPECIFIC] device node describing this instance
  * @read_byte:         [REPLACEABLE] read one byte from the chip
  * @read_word:         [REPLACEABLE] read one word from the chip
  * @write_byte:                [REPLACEABLE] write a single byte to the chip on the
@@ -689,6 +690,8 @@ struct nand_chip {
        void __iomem *IO_ADDR_R;
        void __iomem *IO_ADDR_W;
 
+       int flash_node;
+
        uint8_t (*read_byte)(struct mtd_info *mtd);
        u16 (*read_word)(struct mtd_info *mtd);
        void (*write_byte)(struct mtd_info *mtd, uint8_t byte);