]> git.sur5r.net Git - u-boot/commitdiff
ARM: UniPhier: enable STDMAC for EHCI
authorMasahiro Yamada <yamada.m@jp.panasonic.com>
Thu, 26 Feb 2015 17:26:53 +0000 (02:26 +0900)
committerMasahiro Yamada <yamada.m@jp.panasonic.com>
Sat, 28 Feb 2015 15:02:45 +0000 (00:02 +0900)
Deassert the reset signal and provide the clock for STDMAC core.
This is necessary for the USB 2.0 host controllers.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
arch/arm/mach-uniphier/include/mach/sc-regs.h
arch/arm/mach-uniphier/ph1-ld4/clkrst_init.c
arch/arm/mach-uniphier/ph1-pro4/clkrst_init.c

index 7726530f0b17971b468f1f548decb818499cc184..f0467bbde31fdbf10dfd2f32dc4e0a55e2c8079d 100644 (file)
@@ -39,6 +39,7 @@
 
 #define SC_RSTCTRL                     (SC_BASE_ADDR | 0x2000)
 #define SC_RSTCTRL_NRST_ETHER          (0x1 << 12)
+#define SC_RSTCTRL_NRST_STDMAC         (0x1 << 10)
 #define SC_RSTCTRL_NRST_UMC1           (0x1 <<  5)
 #define SC_RSTCTRL_NRST_UMC0           (0x1 <<  4)
 #define SC_RSTCTRL_NRST_NAND           (0x1 <<  2)
@@ -49,6 +50,7 @@
 #define SC_CLKCTRL                     (SC_BASE_ADDR | 0x2104)
 #define SC_CLKCTRL_CEN_ETHER           (0x1 << 12)
 #define SC_CLKCTRL_CEN_MIO             (0x1 << 11)
+#define SC_CLKCTRL_CEN_STDMAC          (0x1 << 10)
 #define SC_CLKCTRL_CEN_UMC             (0x1 <<  4)
 #define SC_CLKCTRL_CEN_NAND            (0x1 <<  2)
 #define SC_CLKCTRL_CEN_SBC             (0x1 <<  1)
index f5fc418ef033e065a365e31a4c36c82ead7f3a91..4ac5411562ad5cc4dd5ef32fb915a8737090d18e 100644 (file)
@@ -17,6 +17,9 @@ void clkrst_init(void)
 #ifdef CONFIG_UNIPHIER_ETH
        tmp |= SC_RSTCTRL_NRST_ETHER;
 #endif
+#ifdef CONFIG_USB_EHCI_UNIPHIER
+       tmp |= SC_RSTCTRL_NRST_STDMAC;
+#endif
 #ifdef CONFIG_NAND_DENALI
        tmp |= SC_RSTCTRL_NRST_NAND;
 #endif
@@ -29,7 +32,7 @@ void clkrst_init(void)
        tmp |= SC_CLKCTRL_CEN_ETHER;
 #endif
 #ifdef CONFIG_USB_EHCI_UNIPHIER
-       tmp |= SC_CLKCTRL_CEN_MIO;
+       tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
 #endif
 #ifdef CONFIG_NAND_DENALI
        tmp |= SC_CLKCTRL_CEN_NAND;
index f5fc418ef033e065a365e31a4c36c82ead7f3a91..4ac5411562ad5cc4dd5ef32fb915a8737090d18e 100644 (file)
@@ -17,6 +17,9 @@ void clkrst_init(void)
 #ifdef CONFIG_UNIPHIER_ETH
        tmp |= SC_RSTCTRL_NRST_ETHER;
 #endif
+#ifdef CONFIG_USB_EHCI_UNIPHIER
+       tmp |= SC_RSTCTRL_NRST_STDMAC;
+#endif
 #ifdef CONFIG_NAND_DENALI
        tmp |= SC_RSTCTRL_NRST_NAND;
 #endif
@@ -29,7 +32,7 @@ void clkrst_init(void)
        tmp |= SC_CLKCTRL_CEN_ETHER;
 #endif
 #ifdef CONFIG_USB_EHCI_UNIPHIER
-       tmp |= SC_CLKCTRL_CEN_MIO;
+       tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
 #endif
 #ifdef CONFIG_NAND_DENALI
        tmp |= SC_CLKCTRL_CEN_NAND;