]> git.sur5r.net Git - u-boot/commitdiff
net: pch_gbe: Reset during probe
authorPaul Burton <paul.burton@imgtec.com>
Sun, 30 Apr 2017 19:57:05 +0000 (21:57 +0200)
committerJoe Hershberger <joe.hershberger@ni.com>
Fri, 2 Jun 2017 19:44:20 +0000 (14:44 -0500)
Using the EG20T gigabit ethernet controller on the MIPS Boston board, we
find that we have to reset the controller in order for the RGMII link to
the PHY to become functional. Without doing so we constantly time out in
pch_gbe_mdio_ready.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
drivers/net/pch_gbe.c

index d40fff0e48863fb79f26099899257ae4b32566a5..4aac0f67a050d19f1af74392eb3cb254e1ecc809 100644 (file)
@@ -422,6 +422,7 @@ int pch_gbe_probe(struct udevice *dev)
        struct pch_gbe_priv *priv;
        struct eth_pdata *plat = dev_get_platdata(dev);
        void *iobase;
+       int err;
 
        /*
         * The priv structure contains the descriptors and frame buffers which
@@ -444,6 +445,10 @@ int pch_gbe_probe(struct udevice *dev)
        pch_gbe_mdio_init(dev->name, priv->mac_regs);
        priv->bus = miiphy_get_dev_by_name(dev->name);
 
+       err = pch_gbe_reset(dev);
+       if (err)
+               return err;
+
        return pch_gbe_phy_init(dev);
 }