power-domains = <&pwrdom 2>;
};
+ pwm {
+ compatible = "sandbox,pwm";
+ };
+
+ pwm2 {
+ compatible = "sandbox,pwm";
+ };
+
ram {
compatible = "sandbox,ram";
};
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_UT_ENV=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SANDBOX=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_UT_ENV=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SANDBOX=y
CONFIG_UT_TIME=y
CONFIG_UT_DM=y
CONFIG_UT_ENV=y
+CONFIG_DM_PWM=y
+CONFIG_PWM_SANDBOX=y
Various options provided in the hardware (such as capture mode and
continuous/single-shot) are not supported by the driver.
+config PWM_SANDBOX
+ bool "Enable support for the sandbox PWM"
+ help
+ This is a sandbox PWM used for testing. It provides 3 channels and
+ records the settings passed into it, but otherwise does nothing
+ useful. The PWM can be enabled but is not connected to any outputs
+ so this is not very useful.
+
config PWM_TEGRA
bool "Enable support for the Tegra PWM"
depends on DM_PWM
obj-$(CONFIG_PWM_EXYNOS) += exynos_pwm.o
obj-$(CONFIG_PWM_IMX) += pwm-imx.o pwm-imx-util.o
obj-$(CONFIG_PWM_ROCKCHIP) += rk_pwm.o
+obj-$(CONFIG_PWM_SANDBOX) += sandbox_pwm.o
obj-$(CONFIG_PWM_TEGRA) += tegra_pwm.o
--- /dev/null
+/*
+ * Copyright (c) 2015 Google, Inc
+ * Written by Simon Glass <sjg@chromium.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <pwm.h>
+#include <asm/test.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+enum {
+ NUM_CHANNELS = 3,
+};
+
+struct sandbox_pwm_chan {
+ uint period_ns;
+ uint duty_ns;
+ bool enable;
+};
+
+struct sandbox_pwm_priv {
+ struct sandbox_pwm_chan chan[NUM_CHANNELS];
+};
+
+static int sandbox_pwm_set_config(struct udevice *dev, uint channel,
+ uint period_ns, uint duty_ns)
+{
+ struct sandbox_pwm_priv *priv = dev_get_priv(dev);
+ struct sandbox_pwm_chan *chan;
+
+ if (channel >= NUM_CHANNELS)
+ return -ENOSPC;
+ chan = &priv->chan[channel];
+ chan->period_ns = period_ns;
+ chan->duty_ns = duty_ns;
+
+ return 0;
+}
+
+static int sandbox_pwm_set_enable(struct udevice *dev, uint channel,
+ bool enable)
+{
+ struct sandbox_pwm_priv *priv = dev_get_priv(dev);
+ struct sandbox_pwm_chan *chan;
+
+ if (channel >= NUM_CHANNELS)
+ return -ENOSPC;
+ chan = &priv->chan[channel];
+ chan->enable = enable;
+
+ return 0;
+}
+
+static const struct pwm_ops sandbox_pwm_ops = {
+ .set_config = sandbox_pwm_set_config,
+ .set_enable = sandbox_pwm_set_enable,
+};
+
+static const struct udevice_id sandbox_pwm_ids[] = {
+ { .compatible = "sandbox,pwm" },
+ { }
+};
+
+U_BOOT_DRIVER(warm_pwm_sandbox) = {
+ .name = "pwm_sandbox",
+ .id = UCLASS_PWM,
+ .of_match = sandbox_pwm_ids,
+ .ops = &sandbox_pwm_ops,
+ .priv_auto_alloc_size = sizeof(struct sandbox_pwm_priv),
+};
obj-$(CONFIG_DM_MMC) += mmc.o
obj-$(CONFIG_DM_PCI) += pci.o
obj-$(CONFIG_POWER_DOMAIN) += power-domain.o
+obj-$(CONFIG_DM_PWM) += pwm.o
obj-$(CONFIG_RAM) += ram.o
obj-y += regmap.o
obj-$(CONFIG_REMOTEPROC) += remoteproc.o
--- /dev/null
+/*
+ * Copyright (C) 2017 Google, Inc
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <pwm.h>
+#include <dm/test.h>
+#include <test/ut.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* Basic test of the pwm uclass */
+static int dm_test_pwm_base(struct unit_test_state *uts)
+{
+ struct udevice *dev;
+
+ ut_assertok(uclass_get_device(UCLASS_PWM, 0, &dev));
+ ut_assertok(pwm_set_config(dev, 0, 100, 50));
+ ut_assertok(pwm_set_enable(dev, 0, true));
+ ut_assertok(pwm_set_enable(dev, 1, true));
+ ut_assertok(pwm_set_enable(dev, 2, true));
+ ut_asserteq(-ENOSPC, pwm_set_enable(dev, 3, true));
+
+ ut_assertok(uclass_get_device(UCLASS_PWM, 1, &dev));
+ ut_asserteq(-ENODEV, uclass_get_device(UCLASS_PWM, 2, &dev));
+
+ return 0;
+}
+DM_TEST(dm_test_pwm_base, DM_TESTF_SCAN_PDATA | DM_TESTF_SCAN_FDT);