powerpc/85xx: add some missing sync instructions in the CCSR relocation code

Calls to tlbwe and tlbsx should be preceded with an isync/msync pair.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/arch/powerpc/cpu/mpc85xx/start.S b/arch/powerpc/cpu/mpc85xx/start.S
index 275accca5b9ed3e7b2d9d0fdd563575fee8f234b..e519f35d9a1585507c68040db684f51f7348d1d0 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/start.S
+++ b/arch/powerpc/cpu/mpc85xx/start.S
@@ -352,6 +352,8 @@ purge_old_ccsr_tlb:
 
        li      r1, 0
        mtspr   MAS6, r1        /* Search the current address space and PID */
+       isync
+       msync
        tlbsx   0, r8
        mfspr   r1, MAS1
        andis.  r2, r1, MAS1_VALID@h    /* Check for the Valid bit */
@@ -359,6 +361,8 @@ purge_old_ccsr_tlb:
 
        rlwinm  r1, r1, 0, 1, 31        /* Clear Valid bit */
        mtspr   MAS1, r1
+       isync
+       msync
        tlbwe
 1: