powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND

Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing
LAW entries not needed during SPL phase.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/board/freescale/p1_p2_rdb_pc/law.c b/board/freescale/p1_p2_rdb_pc/law.c
index 5ff6ea6aa1f810ddbfcccc65f69c6b1456f80f38..79689199c12f5d9a0bfc41daf8f5cffed1432274 100644 (file)
--- a/board/freescale/p1_p2_rdb_pc/law.c
+++ b/board/freescale/p1_p2_rdb_pc/law.c
@@ -25,15 +25,17 @@
 #include <asm/mmu.h>
 
 struct law_entry law_table[] = {
-       SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_LBC),
+#ifndef CONFIG_NAND_SPL
        SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
        SET_LAW(CONFIG_SYS_PMC_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_LBC),
-#ifdef CONFIG_SYS_NAND_BASE_PHYS
-       SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
-#endif
 #ifdef CONFIG_VSC7385_ENET
        SET_LAW(CONFIG_SYS_VSC7385_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
 #endif
+#endif
+       SET_LAW(CONFIG_SYS_FLASH_BASE_PHYS, LAW_SIZE_64M, LAW_TRGT_IF_LBC),
+#ifdef CONFIG_SYS_NAND_BASE_PHYS
+       SET_LAW(CONFIG_SYS_NAND_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
+#endif
 };
 
 int num_law_entries = ARRAY_SIZE(law_table);