}
#endif /* CONFIG_ARCH_MISC_INIT */
-#ifdef CONFIG_MV_SDHCI
+#ifdef CONFIG_MMC_SDHCI_MV
int board_mmc_init(bd_t *bis)
{
mv_sdh_init(MVEBU_SDIO_BASE, 0, 0,
gd->bd->bi_dram[0].size = gd->ram_size;
}
-#ifdef CONFIG_KONA_SDHCI
+#ifdef CONFIG_MMC_SDHCI_KONA
/*
* mmc_init - Initializes mmc
*/
gd->bd->bi_dram[0].size = gd->ram_size;
}
-#ifdef CONFIG_KONA_SDHCI
+#ifdef CONFIG_MMC_SDHCI_KONA
/*
* mmc_init - Initializes mmc
*/
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_SOUND=y
CONFIG_I2S=y
CONFIG_I2S_SAMSUNG=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_KONA=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_KONA=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_KONA=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_KONA=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_KONA=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_MV=y
CONFIG_SPI_FLASH=y
CONFIG_PCI=y
CONFIG_DEBUG_UART=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_WINBOND_W83627=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYS_I2C_INTEL=y
CONFIG_WINBOND_W83627=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_SPL_OF_TRANSLATE=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_MV=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_DM_I2C=y
CONFIG_NUVOTON_NCT6102D=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SYSCON=y
CONFIG_CPU=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_DFU_MMC=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_S2MPS11=y
CONFIG_DM_REGULATOR=y
CONFIG_DFU_MMC=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_MAX77686=y
CONFIG_DM_REGULATOR=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_SPI=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_SPI=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_CMD_GPIO=y
CONFIG_OF_EMBED=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_CMD_GPIO=y
CONFIG_OF_EMBED=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_BCM2835=y
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_CMD_GPIO=y
CONFIG_OF_EMBED=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_BCM2835=y
# CONFIG_REQUIRE_SERIAL_CONSOLE is not set
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_CMD_GPIO=y
CONFIG_OF_EMBED=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_BCM2835=y
CONFIG_USB=y
CONFIG_USB_STORAGE=y
CONFIG_USB_KEYBOARD=y
CONFIG_DM_PMIC=y
CONFIG_DM_PMIC_MAX8998=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_DM_I2C_COMPAT=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_CMD_FAT=y
CONFIG_CMD_FS_GENERIC=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_I2C=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_CROS_EC=y
CONFIG_CROS_EC_I2C=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_DM_I2C=y
CONFIG_NUVOTON_NCT6102D=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
CONFIG_OF_CONTROL=y
CONFIG_DFU_MMC=y
CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_S5P=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_GADGET=y
If unsure, say N.
+config MMC_SDHCI_SDMA
+ bool "Support SDHCI SDMA"
+ depends on MMC_SDHCI
+ help
+ This enables support for the SDMA (Single Operation DMA) defined
+ in the SD Host Controller Standard Specification Version 1.00 .
+
+config MMC_SDHCI_BCM2835
+ tristate "SDHCI support for the BCM2835 SD/MMC Controller"
+ depends on ARCH_BCM283X
+ depends on MMC_SDHCI
+ help
+ This selects the BCM2835 SD/MMC controller.
+
+ If you have a BCM2835 platform with SD or MMC devices,
+ say Y here.
+
+ If unsure, say N.
+
+config MMC_SDHCI_KONA
+ bool "SDHCI support on Broadcom KONA platform"
+ depends on MMC_SDHCI
+ help
+ This selects the Broadcom Kona Secure Digital Host Controller
+ Interface(SDHCI) support.
+ This is used in Broadcom mobile SoCs.
+
+ If you have a controller with this interface, say Y here.
+
+config MMC_SDHCI_MV
+ bool "SDHCI support on Marvell platform"
+ depends on ARCH_MVEBU
+ depends on MMC_SDHCI
+ help
+ This selects the Secure Digital Host Controller Interface on
+ Marvell platform.
+
+ If you have a controller with this interface, say Y here.
+
+ If unsure, say N.
+
+config MMC_SDHCI_S5P
+ bool "SDHCI support on Samsung S5P SoC"
+ depends on MMC_SDHCI
+ help
+ This selects the Secure Digital Host Controller Interface (SDHCI)
+ on Samsung S5P SoCs.
+
+ If you have a controller with this interface, say Y here.
+
+ If unsure, say N.
+
+config MMC_SDHCI_SPEAR
+ bool "SDHCI support on ST SPEAr platform"
+ depends on MMC_SDHCI
+ help
+ This selects the Secure Digital Host Controller Interface (SDHCI)
+ often referrered to as the HSMMC block in some of the ST SPEAR range
+ of SoC
+
+ If you have a controller with this interface, say Y here.
+
+ If unsure, say N.
+
endif
endmenu
obj-$(CONFIG_ARM_PL180_MMCI) += arm_pl180_mmci.o
obj-$(CONFIG_ATMEL_SDHCI) += atmel_sdhci.o
-obj-$(CONFIG_BCM2835_SDHCI) += bcm2835_sdhci.o
obj-$(CONFIG_BFIN_SDH) += bfin_sdh.o
obj-$(CONFIG_DAVINCI_MMC) += davinci_mmc.o
obj-$(CONFIG_DWMMC) += dw_mmc.o
obj-$(CONFIG_GENERIC_MMC) += mmc_boot.o
endif
obj-$(CONFIG_GENERIC_ATMEL_MCI) += gen_atmel_mci.o
-obj-$(CONFIG_KONA_SDHCI) += kona_sdhci.o
obj-$(CONFIG_MMC_SPI) += mmc_spi.o
obj-$(CONFIG_MMC_SUNXI) += sunxi_mmc.o
-obj-$(CONFIG_MV_SDHCI) += mv_sdhci.o
obj-$(CONFIG_MVEBU_MMC) += mvebu_mmc.o
obj-$(CONFIG_MXC_MMC) += mxcmmc.o
obj-$(CONFIG_MXS_MMC) += mxsmmc.o
obj-$(CONFIG_ROCKCHIP_DWMMC) += rockchip_dw_mmc.o
obj-$(CONFIG_SUPPORT_EMMC_RPMB) += rpmb.o
obj-$(CONFIG_S3C_SDI) += s3c_sdi.o
-obj-$(CONFIG_S5P_SDHCI) += s5p_sdhci.o
ifdef CONFIG_BLK
ifdef CONFIG_GENERIC_MMC
obj-$(CONFIG_SANDBOX) += sandbox_mmc.o
endif
endif
-obj-$(CONFIG_MMC_SDHCI) += sdhci.o
obj-$(CONFIG_SH_MMCIF) += sh_mmcif.o
obj-$(CONFIG_SH_SDHI) += sh_sdhi.o
obj-$(CONFIG_SOCFPGA_DWMMC) += socfpga_dw_mmc.o
endif
obj-$(CONFIG_PIC32_SDHCI) += pic32_sdhci.o
obj-$(CONFIG_MSM_SDHCI) += msm_sdhci.o
+
+# SDHCI
+obj-$(CONFIG_MMC_SDHCI) += sdhci.o
+obj-$(CONFIG_MMC_SDHCI_BCM2835) += bcm2835_sdhci.o
+obj-$(CONFIG_MMC_SDHCI_KONA) += kona_sdhci.o
+obj-$(CONFIG_MMC_SDHCI_MV) += mv_sdhci.o
+obj-$(CONFIG_MMC_SDHCI_S5P) += s5p_sdhci.o
+obj-$(CONFIG_MMC_SDHCI_SPEAR) += spear_sdhci.o
unsigned int start_addr)
{
unsigned int stat, rdy, mask, timeout, block = 0;
-#ifdef CONFIG_MMC_SDMA
+#ifdef CONFIG_MMC_SDHCI_SDMA
unsigned char ctrl;
ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
ctrl &= ~SDHCI_CTRL_DMA_MASK;
if (++block >= data->blocks)
break;
}
-#ifdef CONFIG_MMC_SDMA
+#ifdef CONFIG_MMC_SDHCI_SDMA
if (stat & SDHCI_INT_DMA_END) {
sdhci_writel(host, SDHCI_INT_DMA_END, SDHCI_INT_STATUS);
start_addr &= ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1);
if (data->flags == MMC_DATA_READ)
mode |= SDHCI_TRNS_READ;
-#ifdef CONFIG_MMC_SDMA
+#ifdef CONFIG_MMC_SDHCI_SDMA
if (data->flags == MMC_DATA_READ)
start_addr = (unsigned long)data->dest;
else
}
sdhci_writel(host, cmd->cmdarg, SDHCI_ARGUMENT);
-#ifdef CONFIG_MMC_SDMA
+#ifdef CONFIG_MMC_SDHCI_SDMA
trans_bytes = ALIGN(trans_bytes, CONFIG_SYS_CACHELINE_SIZE);
flush_cache(start_addr, trans_bytes);
#endif
caps = sdhci_readl(host, SDHCI_CAPABILITIES);
-#ifdef CONFIG_MMC_SDMA
+#ifdef CONFIG_MMC_SDHCI_SDMA
if (!(caps & SDHCI_CAN_DO_SDMA)) {
printf("%s: Your controller doesn't support SDMA!!\n",
__func__);
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC_SDMA
/* Environment configuration */
#define CONFIG_ENV_SECT_SIZE 0x1000
#define CONFIG_KONA_GPIO
/* MMC/SD Driver */
-#define CONFIG_MMC_SDMA
-#define CONFIG_KONA_SDHCI
#define CONFIG_GENERIC_MMC
#define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR
#define CONFIG_KONA_GPIO
/* MMC/SD Driver */
-#define CONFIG_MMC_SDMA
-#define CONFIG_KONA_SDHCI
#define CONFIG_GENERIC_MMC
#define CONFIG_SYS_SDIO_BASE0 SDIO1_BASE_ADDR
/*
* SDIO/MMC Card Configuration
*/
-#define CONFIG_MMC_SDMA
#define CONFIG_GENERIC_MMC
-#define CONFIG_MV_SDHCI
#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
/* Partition support */
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC_SDMA
#undef CONFIG_USB_MAX_CONTROLLER_COUNT
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SATA}
#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC_SDMA
/* Environment configuration */
#define CONFIG_ENV_SECT_SIZE 0x1000
/*
* SDIO/MMC Card Configuration
*/
-#define CONFIG_MMC_SDMA
#define CONFIG_GENERIC_MMC
-#define CONFIG_MV_SDHCI
#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
/*
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC_SDMA
#undef CONFIG_USB_MAX_CONTROLLER_COUNT
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
/* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
-#define CONFIG_S5P_SDHCI
#define CONFIG_DWMMC
#define CONFIG_EXYNOS_DWMMC
#define CONFIG_BOUNCE_BUFFER
#define CONFIG_REVISION_TAG
/* SD/MMC configuration */
-#define CONFIG_MMC_SDMA
#define CONFIG_MMC_DEFAULT_DEV 0
#undef CONFIG_CMD_ONENAND
/* SD/MMC support */
#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC_SDMA
/* 10/100M Ethernet support */
#define CONFIG_DESIGNWARE_ETH
{PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_VALLEYVIEW_SATA_ALT}
#define CONFIG_GENERIC_MMC
-#define CONFIG_MMC_SDMA
#undef CONFIG_USB_MAX_CONTROLLER_COUNT
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
/* SD/MMC configuration */
#define CONFIG_GENERIC_MMC
#define CONFIG_MMC_SDHCI_IO_ACCESSORS
-#define CONFIG_BCM2835_SDHCI
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_DWC2
/* MMC */
#define CONFIG_GENERIC_MMC
-#define CONFIG_S5P_SDHCI
#define SDHCI_MAX_HOSTS 4
/* PWM */