]> git.sur5r.net Git - u-boot/commitdiff
imx: ventana: gsc: add new hwmon rails
authorTim Harvey <tharvey@gateworks.com>
Wed, 8 Apr 2015 19:54:52 +0000 (12:54 -0700)
committerStefano Babic <sbabic@denx.de>
Wed, 22 Apr 2015 12:39:10 +0000 (14:39 +0200)
Add a new voltage rail added in various -C revision PCB's.

Additionally make VDD_CORE, VDD_SOC, and VDD_IO2 common as all Ventana boards
have those.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
board/gateworks/gw_ventana/gsc.c
board/gateworks/gw_ventana/gsc.h

index 27bfeaecbf3a1c9a49f4ad7f4395496396d8e995..a62f128b7fd36bec3fcd7e4c59d27ca50f866a8a 100644 (file)
@@ -87,30 +87,29 @@ int do_gsc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
        read_hwmon("VIN",      GSC_HWMON_VIN, 3);
        read_hwmon("VBATT",    GSC_HWMON_VBATT, 3);
        read_hwmon("VDD_3P3",  GSC_HWMON_VDD_3P3, 3);
+       read_hwmon("VDD_ARM",  GSC_HWMON_VDD_CORE, 3);
+       read_hwmon("VDD_SOC",  GSC_HWMON_VDD_SOC, 3);
        read_hwmon("VDD_HIGH", GSC_HWMON_VDD_HIGH, 3);
        read_hwmon("VDD_DDR",  GSC_HWMON_VDD_DDR, 3);
        read_hwmon("VDD_5P0",  GSC_HWMON_VDD_5P0, 3);
        read_hwmon("VDD_2P5",  GSC_HWMON_VDD_2P5, 3);
        read_hwmon("VDD_1P8",  GSC_HWMON_VDD_1P8, 3);
+       read_hwmon("VDD_IO2",  GSC_HWMON_VDD_IO2, 3);
        switch (model[3]) {
        case '1': /* GW51xx */
-               read_hwmon("VDD_CORE", GSC_HWMON_VDD_CORE, 3);
-               read_hwmon("VDD_SOC",  GSC_HWMON_VDD_SOC, 3);
+               read_hwmon("VDD_IO3",  GSC_HWMON_VDD_IO4, 3); /* -C rev */
                break;
        case '2': /* GW52xx */
+               break;
        case '3': /* GW53xx */
-               read_hwmon("VDD_CORE", GSC_HWMON_VDD_CORE, 3);
-               read_hwmon("VDD_SOC",  GSC_HWMON_VDD_SOC, 3);
-               read_hwmon("VDD_1P0",  GSC_HWMON_VDD_1P0, 3);
+               read_hwmon("VDD_IO4",  GSC_HWMON_VDD_IO4, 3); /* -C rev */
+               read_hwmon("VDD_GPS",  GSC_HWMON_VDD_IO3, 3);
                break;
        case '4': /* GW54xx */
-               read_hwmon("VDD_CORE", GSC_HWMON_VDD_CORE, 3);
-               read_hwmon("VDD_SOC",  GSC_HWMON_VDD_SOC, 3);
-               read_hwmon("VDD_1P0",  GSC_HWMON_VDD_1P0, 3);
+               read_hwmon("VDD_IO3",  GSC_HWMON_VDD_IO4, 3); /* -C rev */
+               read_hwmon("VDD_GPS",  GSC_HWMON_VDD_IO3, 3);
                break;
        case '5': /* GW55xx */
-               read_hwmon("VDD_CORE", GSC_HWMON_VDD_CORE, 3);
-               read_hwmon("VDD_SOC",  GSC_HWMON_VDD_SOC, 3);
                break;
        }
        return 0;
index da970c39d6a061d64697a6e65e7471c5cf22b413..0a70774cd98575a14b2b1c276faf9b190ea5e91c 100644 (file)
@@ -50,8 +50,10 @@ enum {
        GSC_HWMON_VDD_DDR       = 0x17,
        GSC_HWMON_VDD_SOC       = 0x11,
        GSC_HWMON_VDD_1P8       = 0x1d,
+       GSC_HWMON_VDD_IO2       = 0x20,
        GSC_HWMON_VDD_2P5       = 0x23,
-       GSC_HWMON_VDD_1P0       = 0x20,
+       GSC_HWMON_VDD_IO3       = 0x26,
+       GSC_HWMON_VDD_IO4       = 0x29,
 };
 
 /*