* 0xd0000000   256M    Rapid IO MEM Second half
         */
        .long TLB1_MAS0(1, 3, 0)
-       .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1GB)
+       .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1G)
        .long TLB1_MAS2(E500_TLB_EPN(CFG_PEX_MEM_BASE), 0,0,0,0,1,0,1,0)
        .long TLB1_MAS3(E500_TLB_RPN(CFG_PEX_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
 
 
 #define BOOKE_PAGESZ_16M        7
 #define BOOKE_PAGESZ_64M        8
 #define BOOKE_PAGESZ_256M       9
-#define BOOKE_PAGESZ_1GB        10
-#define BOOKE_PAGESZ_4GB        11
+#define BOOKE_PAGESZ_1G                10
+#define BOOKE_PAGESZ_4G                11
 
 #if defined(CONFIG_MPC86xx)
 #define LAWBAR_BASE_ADDR       0x00FFFFFF