uint autoc12err;
uint hostcapblt;
uint wml;
- char reserved1[8];
+ uint mixctrl;
+ char reserved1[4];
uint fevt;
char reserved2[168];
uint hostver;
/* Send the command */
esdhc_write32(®s->cmdarg, cmd->cmdarg);
+#if defined(CONFIG_FSL_USDHC)
+ esdhc_write32(®s->mixctrl,
+ (esdhc_read32(®s->mixctrl) & 0xFFFFFF80) | (xfertyp & 0x7F));
+ esdhc_write32(®s->xfertyp, xfertyp & 0xFFFF0000);
+#else
esdhc_write32(®s->xfertyp, xfertyp);
-
+#endif
/* Wait for the command to complete */
while (!(esdhc_read32(®s->irqstat) & IRQSTAT_CC))
;
mmc = malloc(sizeof(struct mmc));
- sprintf(mmc->name, "FSL_ESDHC");
+ sprintf(mmc->name, "FSL_SDHC");
regs = (struct fsl_esdhc *)cfg->esdhc_base;
/* First reset the eSDHC controller */