return gd->arch.fpga_state[dev];
}
-void print_fpga_state(unsigned dev)
-{
- if (gd->arch.fpga_state[dev] & FPGA_STATE_DONE_FAILED)
- puts(" Waiting for FPGA-DONE timed out.\n");
- if (gd->arch.fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
- puts(" FPGA reflection test failed.\n");
-}
-
int board_early_init_f(void)
{
unsigned k;
&& !((hardware_version == HWVER_101)
&& (fpga_state == FPGA_STATE_DONE_FAILED))) {
puts("not available\n");
- print_fpga_state(dev);
+ if (fpga_state & FPGA_STATE_DONE_FAILED)
+ puts(" Waiting for FPGA-DONE timed out.\n");
+ if (fpga_state & FPGA_STATE_REFLECTION_FAILED)
+ puts(" FPGA reflection test failed.\n");
return;
}
return gd->arch.fpga_state[dev];
}
-void print_fpga_state(unsigned dev)
-{
- if (gd->arch.fpga_state[dev] & FPGA_STATE_DONE_FAILED)
- puts(" Waiting for FPGA-DONE timed out.\n");
- if (gd->arch.fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
- puts(" FPGA reflection test failed.\n");
-}
-
int board_early_init_f(void)
{
u32 val;
return gd->arch.fpga_state[dev];
}
-void print_fpga_state(unsigned dev)
-{
- if (gd->arch.fpga_state[dev] & FPGA_STATE_DONE_FAILED)
- puts(" Waiting for FPGA-DONE timed out.\n");
- if (gd->arch.fpga_state[dev] & FPGA_STATE_REFLECTION_FAILED)
- puts(" FPGA reflection test failed.\n");
-}
-
int board_early_init_f(void)
{
unsigned k;
};
int get_fpga_state(unsigned dev);
-void print_fpga_state(unsigned dev);
int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data);
int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data);