return flag_is_changeable_p(X86_EFLAGS_ID);
}
+static bool has_mtrr(void)
+{
+ return cpuid_edx(0x00000001) & (1 << 12) ? true : false;
+}
+
static int build_vendor_name(char *vendor_name)
{
struct cpuid_result result;
gd->arch.x86_model = c.x86_model;
gd->arch.x86_mask = c.x86_mask;
gd->arch.x86_device = cpu.device;
+
+ gd->arch.has_mtrr = has_mtrr();
}
return 0;
/* Architecture-specific global data */
struct arch_global_data {
- struct global_data *gd_addr; /* Location of Global Data */
- uint8_t x86; /* CPU family */
- uint8_t x86_vendor; /* CPU vendor */
- uint8_t x86_model;
- uint8_t x86_mask;
+ struct global_data *gd_addr; /* Location of Global Data */
+ uint8_t x86; /* CPU family */
+ uint8_t x86_vendor; /* CPU vendor */
+ uint8_t x86_model;
+ uint8_t x86_mask;
uint32_t x86_device;
uint64_t tsc_base; /* Initial value returned by rdtsc() */
uint32_t tsc_base_kclocks; /* Initial tsc as a kclocks value */
const struct pch_gpio_map *gpio_map; /* board GPIO map */
struct memory_info meminfo; /* Memory information */
#ifdef CONFIG_HAVE_FSP
- void *hob_list; /* FSP HOB list */
+ void *hob_list; /* FSP HOB list */
#endif
struct mtrr_request mtrr_req[MAX_MTRR_REQUESTS];
int mtrr_req_count;
+ int has_mtrr;
};
#endif