rockchip: efuse: add (misc) driver for RK3399 non-secure efuse block

This adds a simple driver for reading the efuse block of the RK3399.
It should be easy enough to add drivers for other devices (e.g. the
RK3328, RK3368, etc.) by passing the device details via driver_data.

Unlike the kernel driver (using the nvmem subsystem), we don't expose
the efuse as multiple named cells, but rather as a linear memory that
can be read using misc_read(...).

The primary use case (as of today) is the generation of a 'serial#'
(and a 'cpuid#') environment variable for the RK3399-Q7 (Puma)
system-on-module.

Note that this adds a debug-only (i.e. only if DEBUG is defined)
command 'rk3399_dump_efuses' that dumps the efuse block's content.
N.B.: The name 'rk3399_dump_efuses' was intentionally chosen to
      include a SoC-name (together with a comment in the function) to
      remind whoever adds support for additional SoCs that this
      function currently makes assumptions regarding the size of the
      fuse-box based on the RK3399. The hope is that the function is
      adjusted to reflect any changes resulting from generalising the
      driver for multiple SoCs and is then renamed.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index ecca159d142f69b96aa2dc649e61eaf686050eab..92f348f409089fdd77e61edc691278b15f7ed1ee 100644 (file)
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -20,6 +20,19 @@ config ALTERA_SYSID
          Select this to enable a sysid for Altera devices. Please find
          details on the "Embedded Peripherals IP User Guide" of Altera.
 
+config ROCKCHIP_EFUSE
+        bool "Rockchip e-fuse support"
+       depends on MISC
+       help
+         Enable (read-only) access for the e-fuse block found in Rockchip
+         SoCs: accesses can either be made using byte addressing and a length
+         or through child-nodes that are generated based on the e-fuse map
+         retrieved from the DTS.
+
+         This driver currently supports the RK3399 only, but can easily be
+         extended (by porting the read function from the Linux kernel sources)
+         to support other recent Rockchip devices.
+
 config CMD_CROS_EC
        bool "Enable crosec command"
        depends on CROS_EC

diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index 4543cd647e59b5ca26757116bce41a2814f36219..ea64677c3339f09d8cb8dfb43162c5a2a3a4d941 100644 (file)
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -50,3 +50,4 @@ obj-$(CONFIG_PCA9551_LED) += pca9551_led.o
 obj-$(CONFIG_FSL_DEVICE_DISABLE) += fsl_devdis.o
 obj-$(CONFIG_WINBOND_W83627) += winbond_w83627.o
 obj-$(CONFIG_QFW) += qfw.o
+obj-$(CONFIG_ROCKCHIP_EFUSE) += rockchip-efuse.o

diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
new file mode 100644 (file)
index 0000000..423d24c
--- /dev/null
+++ b/drivers/misc/rockchip-efuse.c
@@ -0,0 +1,161 @@
+/*
+ * eFuse driver for Rockchip devices
+ *
+ * Copyright 2017, Theobroma Systems Design und Consulting GmbH
+ * Written by Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
+ *
+ * SPDX-License-Identifier:    GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <command.h>
+#include <display_options.h>
+#include <dm.h>
+#include <linux/bitops.h>
+#include <linux/delay.h>
+#include <misc.h>
+
+#define RK3399_A_SHIFT          16
+#define RK3399_A_MASK           0x3ff
+#define RK3399_NFUSES           32
+#define RK3399_BYTES_PER_FUSE   4
+#define RK3399_STROBSFTSEL      BIT(9)
+#define RK3399_RSB              BIT(7)
+#define RK3399_PD               BIT(5)
+#define RK3399_PGENB            BIT(3)
+#define RK3399_LOAD             BIT(2)
+#define RK3399_STROBE           BIT(1)
+#define RK3399_CSB              BIT(0)
+
+struct rockchip_efuse_regs {
+       u32 ctrl;      /* 0x00  efuse control register */
+       u32 dout;      /* 0x04  efuse data out register */
+       u32 rf;        /* 0x08  efuse redundancy bit used register */
+       u32 _rsvd0;
+       u32 jtag_pass; /* 0x10  JTAG password */
+       u32 strobe_finish_ctrl;
+                      /* 0x14  efuse strobe finish control register */
+};
+
+struct rockchip_efuse_platdata {
+       void __iomem *base;
+       struct clk *clk;
+};
+
+#if defined(DEBUG)
+static int dump_efuses(cmd_tbl_t *cmdtp, int flag,
+                      int argc, char * const argv[])
+{
+       /*
+        * N.B.: This function is tailored towards the RK3399 and assumes that
+        *       there's always 32 fuses x 32 bits (i.e. 128 bytes of data) to
+        *       be read.
+        */
+
+       struct udevice *dev;
+       u8 fuses[128];
+       int ret;
+
+       /* retrieve the device */
+       ret = uclass_get_device_by_driver(UCLASS_MISC,
+                                         DM_GET_DRIVER(rockchip_efuse), &dev);
+       if (ret) {
+               printf("%s: no misc-device found\n", __func__);
+               return 0;
+       }
+
+       ret = misc_read(dev, 0, &fuses, sizeof(fuses));
+       if (ret) {
+               printf("%s: misc_read failed\n", __func__);
+               return 0;
+       }
+
+       printf("efuse-contents:\n");
+       print_buffer(0, fuses, 1, 128, 16);
+
+       return 0;
+}
+
+U_BOOT_CMD(
+       rk3399_dump_efuses, 1, 1, dump_efuses,
+       "Dump the content of the efuses",
+       ""
+);
+#endif
+
+static int rockchip_rk3399_efuse_read(struct udevice *dev, int offset,
+                                     void *buf, int size)
+{
+       struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+       struct rockchip_efuse_regs *efuse =
+               (struct rockchip_efuse_regs *)plat->base;
+
+       unsigned int addr_start, addr_end, addr_offset;
+       u32 out_value;
+       u8  bytes[RK3399_NFUSES * RK3399_BYTES_PER_FUSE];
+       int i = 0;
+       u32 addr;
+
+       addr_start = offset / RK3399_BYTES_PER_FUSE;
+       addr_offset = offset % RK3399_BYTES_PER_FUSE;
+       addr_end = DIV_ROUND_UP(offset + size, RK3399_BYTES_PER_FUSE);
+
+       /* cap to the size of the efuse block */
+       if (addr_end > RK3399_NFUSES)
+               addr_end = RK3399_NFUSES;
+
+       writel(RK3399_LOAD | RK3399_PGENB | RK3399_STROBSFTSEL | RK3399_RSB,
+              &efuse->ctrl);
+       udelay(1);
+       for (addr = addr_start; addr < addr_end; addr++) {
+               setbits_le32(&efuse->ctrl,
+                            RK3399_STROBE | (addr << RK3399_A_SHIFT));
+               udelay(1);
+               out_value = readl(&efuse->dout);
+               clrbits_le32(&efuse->ctrl, RK3399_STROBE);
+               udelay(1);
+
+               memcpy(&bytes[i], &out_value, RK3399_BYTES_PER_FUSE);
+               i += RK3399_BYTES_PER_FUSE;
+       }
+
+       /* Switch to standby mode */
+       writel(RK3399_PD | RK3399_CSB, &efuse->ctrl);
+
+       memcpy(buf, bytes + addr_offset, size);
+
+       return 0;
+}
+
+static int rockchip_efuse_read(struct udevice *dev, int offset,
+                              void *buf, int size)
+{
+       return rockchip_rk3399_efuse_read(dev, offset, buf, size);
+}
+
+static const struct misc_ops rockchip_efuse_ops = {
+       .read = rockchip_efuse_read,
+};
+
+static int rockchip_efuse_ofdata_to_platdata(struct udevice *dev)
+{
+       struct rockchip_efuse_platdata *plat = dev_get_platdata(dev);
+
+       plat->base = (void *)devfdt_get_addr(dev);
+       return 0;
+}
+
+static const struct udevice_id rockchip_efuse_ids[] = {
+       { .compatible = "rockchip,rk3399-efuse" },
+       {}
+};
+
+U_BOOT_DRIVER(rockchip_efuse) = {
+       .name = "rockchip_efuse",
+       .id = UCLASS_MISC,
+       .of_match = rockchip_efuse_ids,
+       .ofdata_to_platdata = rockchip_efuse_ofdata_to_platdata,
+       .platdata_auto_alloc_size = sizeof(struct rockchip_efuse_platdata),
+       .ops = &rockchip_efuse_ops,
+};