]> git.sur5r.net Git - u-boot/commitdiff
Merge branch 'master' of /home/wd/git/u-boot/lwmon5
authorWolfgang Denk <wd@denx.de>
Fri, 25 Apr 2008 09:32:01 +0000 (11:32 +0200)
committerWolfgang Denk <wd@denx.de>
Fri, 25 Apr 2008 09:32:01 +0000 (11:32 +0200)
Conflicts:

common/cmd_bootm.c
common/cmd_log.c
include/common.h
post/board/lwmon5/Makefile
post/board/lwmon5/dsp.c
post/board/lwmon5/dspic.c
post/board/lwmon5/fpga.c
post/board/lwmon5/gdc.c
post/board/lwmon5/sysmon.c
post/board/lwmon5/watchdog.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
1  2 
Makefile
common/cmd_mem.c
include/asm-ppc/global_data.h
include/common.h
include/configs/lwmon5.h
post/board/lwmon5/watchdog.c
post/drivers/rtc.c

diff --cc Makefile
Simple merge
Simple merge
Simple merge
Simple merge
index 36adf669d404681fbf93f9e977cc8124ef274ff0,58f078b6d89c6d087dacaa0bc188ef60be50b58d..cc6f87c61383ca5a8c927ce44b53e3e1834635e8
  #define CFG_INIT_SP_OFFSET    CFG_GBL_DATA_OFFSET
  #define CFG_POST_ALT_WORD_ADDR        (CFG_PERIPHERAL_BASE + GPT0_COMP6)
                                                /* unused GPT0 COMP reg */
 +#define CFG_MEM_TOP_HIDE      (4 << 10) /* don't use last 4kbytes     */
 +                                      /* 440EPx errata CHIP 11        */
 +
 +/* Additional registers for watchdog timer post test */
 +
 +#define CFG_DSPIC_TEST_ADDR   (CFG_PERIPHERAL_BASE + GPT0_COMP5)
 +#define CFG_WATCHDOG_TIME_ADDR        (CFG_PERIPHERAL_BASE + GPT0_COMP4)
 +#define CFG_WATCHDOG_FLAGS_ADDR       (CFG_PERIPHERAL_BASE + GPT0_COMP5)
 +#define CFG_WATCHDOG_MAGIC    0x12480000
 +#define CFG_WATCHDOG_MAGIC_MASK       0xFFFF0000
 +#define CFG_DSPIC_TEST_MASK   0x00000001
  
+ /* Additional registers for watchdog timer post test */
+ #define CFG_DSPIC_TEST_ADDR   (CFG_PERIPHERAL_BASE + GPT0_COMP5)
+ #define CFG_WATCHDOG_TIME_ADDR        (CFG_PERIPHERAL_BASE + GPT0_COMP4)
+ #define CFG_WATCHDOG_FLAGS_ADDR       (CFG_PERIPHERAL_BASE + GPT0_COMP5)
+ #define CFG_WATCHDOG_MAGIC    0x12480000
+ #define CFG_WATCHDOG_MAGIC_MASK       0xFFFF0000
+ #define CFG_DSPIC_TEST_MASK   0x00000001
  /*-----------------------------------------------------------------------
   * Serial Port
   *----------------------------------------------------------------------*/
index 899fbfbbd7191c797ecc1608241c88808f456f61,699266bbfedc6b4a0b0aece81da9d920f48abd01..16c01bee4383af554fdcdb6eb28da75adf709432
@@@ -117,20 -109,20 +109,19 @@@ int lwmon5_watchdog_post_test(int flags
                /* 3.2.6. Mark test as failed. */
                post_log("hw watchdog time : %u ms, failed ", time);
                return 2;
+       } else {
+               /* 3.3. Scratch register matches magic value 0x1248xxxx
+                * Assume this is watchdog-initiated reset
+                */
+               ulong time;
+               /* 3.3.1. So, the test succeed, save measured time to syslog. */
+               time = in_be32((void *)CFG_WATCHDOG_TIME_ADDR);
+               post_log("hw watchdog time : %u ms, passed ", time);
+               /* 3.3.2. Set scratch register 1 to 0x0000xxxx */
+               watchdog_magic_write(0);
+               return 0;
        }
-       /*
-        * 3.3. Scratch register matches magic value 0x1248xxxx
-        * Assume this is watchdog-initiated reset
-        */
-       /* 3.3.1. So, the test succeed, save measured time to syslog. */
-       time = in_be32((void *)CFG_WATCHDOG_TIME_ADDR);
-       post_log("hw watchdog time : %u ms, passed ", time);
-       /* 3.3.2. Set scratch register 1 to 0x0000xxxx */
-       watchdog_magic_write(0);
-       return 0;
+       return -1;
  }
  
 -
  #endif /* CONFIG_POST & CFG_POST_WATCHDOG */
- #endif /* CONFIG_POST */
Simple merge