]> git.sur5r.net Git - u-boot/commitdiff
x86: braswell: cherryhill: Update dts for SPI lock down
authorBin Meng <bmeng.cn@gmail.com>
Thu, 19 Oct 2017 01:20:58 +0000 (18:20 -0700)
committerBin Meng <bmeng.cn@gmail.com>
Fri, 27 Oct 2017 07:13:47 +0000 (15:13 +0800)
Intel Braswell FSP requires SPI controller settings to be locked down,
let's do this in the chrryhill.dts and remove previous Kconfig option.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
arch/x86/cpu/braswell/Kconfig
arch/x86/dts/cherryhill.dts

index 616f22878831870bd14cbbb4337fc7fc7f6ac4bd..31ac279c568e5f3eb8a45bb0e0824a4c4650957f 100644 (file)
@@ -31,8 +31,4 @@ config FSP_ADDR
        hex
        default 0xfff20000
 
-config FSP_LOCKDOWN_SPI
-       bool
-       default y
-
 endif
index 840a6699568f9459900d7d7d6de0763d47e34727..41e72f3eb6260203dddea19b59e142588f44656d 100644 (file)
                                #address-cells = <1>;
                                #size-cells = <0>;
                                compatible = "intel,ich9-spi";
+                               intel,spi-lock-down;
 
                                spi-flash@0 {
                                        #address-cells = <1>;