Programmable memory pages that are stored on the some
Freescale i.MX processors.
+config NUVOTON_NCT6102D
+ bool "Enable Nuvoton NCT6102D Super I/O driver"
+ help
+ If you say Y here, you will get support for the Nuvoton
+ NCT6102D Super I/O driver. This can be used to enable or
+ disable the legacy UART, the watchdog or other devices
+ in the Nuvoton Super IO chips on X86 platforms.
+
config PWRSEQ
bool "Enable power-sequencing drivers"
depends on DM
obj-$(CONFIG_FSL_MC9SDZ60) += mc9sdz60.o
obj-$(CONFIG_MXC_OCOTP) += mxc_ocotp.o
obj-$(CONFIG_MXS_OCOTP) += mxs_ocotp.o
+obj-$(CONFIG_NUVOTON_NCT6102D) += nuvoton_nct6102d.o
obj-$(CONFIG_NS87308) += ns87308.o
obj-$(CONFIG_PDSP188x) += pdsp188x.o
obj-$(CONFIG_$(SPL_)PWRSEQ) += pwrseq-uclass.o
--- /dev/null
+/*
+ * Copyright (C) 2016 Stefan Roese <sr@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <nuvoton_nct6102d.h>
+#include <asm/io.h>
+#include <asm/pnp_def.h>
+
+static void superio_outb(int reg, int val)
+{
+ outb(reg, NCT_EFER);
+ outb(val, NCT_EFDR);
+}
+
+static inline int superio_inb(int reg)
+{
+ outb(reg, NCT_EFER);
+ return inb(NCT_EFDR);
+}
+
+static int superio_enter(void)
+{
+ outb(NCT_ENTRY_KEY, NCT_EFER); /* Enter extended function mode */
+ outb(NCT_ENTRY_KEY, NCT_EFER); /* Again according to manual */
+
+ return 0;
+}
+
+static void superio_select(int ld)
+{
+ superio_outb(NCT_LD_SELECT_REG, ld);
+}
+
+static void superio_exit(void)
+{
+ outb(NCT_EXIT_KEY, NCT_EFER); /* Leave extended function mode */
+}
+
+/*
+ * The Nuvoton NCT6102D starts per default after reset with both,
+ * the internal watchdog and the internal legacy UART enabled. This
+ * code provides a function to disable the watchdog.
+ */
+int nct6102d_wdt_disable(void)
+{
+ superio_enter();
+ /* Select logical device for WDT */
+ superio_select(NCT6102D_LD_WDT);
+ superio_outb(NCT6102D_WDT_TIMEOUT, 0x00);
+ superio_exit();
+
+ return 0;
+}
--- /dev/null
+/*
+ * Copyright (C) 2016 Stefan Roese <sr@denx.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _NUVOTON_NCT6102D_H_
+#define _NUVOTON_NCT6102D_H_
+
+/* I/O address of Nuvoton Super IO chip */
+#define NCT6102D_IO_PORT 0x4e
+
+/* Extended Function Enable Registers */
+#define NCT_EFER (NCT6102D_IO_PORT + 0)
+/* Extended Function Index Register (same as EFER) */
+#define NCT_EFIR (NCT6102D_IO_PORT + 0)
+/* Extended Function Data Register */
+#define NCT_EFDR (NCT_EFIR + 1)
+
+#define NCT_LD_SELECT_REG 0x07
+
+/* Logical device number */
+#define NCT6102D_LD_UARTA 0x02
+#define NCT6102D_LD_WDT 0x08
+
+#define NCT6102D_UARTA_ENABLE 0x30
+#define NCT6102D_WDT_TIMEOUT 0xf1
+
+#define NCT_ENTRY_KEY 0x87
+#define NCT_EXIT_KEY 0xaa
+
+int nct6102d_wdt_disable(void);
+
+#endif /* _NUVOTON_NCT6102D_H_ */