board/b4860qds: Relax NOR flash teadc timing parameter

Relax parameters to give address latching more time to setup.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index b45001a58920eabcc286be897132ebd3f948dfc6..a823f9f3a77c5ae686b0e9abf663e9e5ed6dd697 100644 (file)
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -236,7 +236,7 @@ unsigned long get_board_ddr_clk(void);
 /* NOR Flash Timing Params */
 #define CONFIG_SYS_NOR_CSOR    CSOR_NOR_ADM_SHIFT(4)
 #define CONFIG_SYS_NOR_FTIM0   (FTIM0_NOR_TACSE(0x01) | \
-                               FTIM0_NOR_TEADC(0x01) | \
+                               FTIM0_NOR_TEADC(0x04) | \
                                FTIM0_NOR_TEAHC(0x20))
 #define CONFIG_SYS_NOR_FTIM1   (FTIM1_NOR_TACO(0x35) | \
                                FTIM1_NOR_TRAD_NOR(0x1A) |\