Adjustments / cleanup for PPChameleon EVB board

diff --git a/board/dave/PPChameleonEVB/PPChameleonEVB.c b/board/dave/PPChameleonEVB/PPChameleonEVB.c
index 04b7cd781321eb927a1a56f4b29db3981fbde7ac..d015f69a90706eb37bec85ba20a5958093f986e3 100644 (file)
--- a/board/dave/PPChameleonEVB/PPChameleonEVB.c
+++ b/board/dave/PPChameleonEVB/PPChameleonEVB.c
@@ -261,9 +261,10 @@ nand_probe(ulong physadr);
 void
 nand_init(void)
 {
-       printf("Probing at 0x%.8x\n", CFG_NAND0_BASE);
-       nand_probe(CFG_NAND0_BASE);
-       printf("Probing at 0x%.8x\n", CFG_NAND1_BASE);
-       nand_probe(CFG_NAND1_BASE);
+       debug ("Probing at 0x%.8x\n", CFG_NAND0_BASE);
+       nand_probe (CFG_NAND0_BASE);
+
+       debug ("Probing at 0x%.8x\n", CFG_NAND1_BASE);
+       nand_probe (CFG_NAND1_BASE);
 }
 #endif

diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index 26cbe5d1f28f5a4ef1c37cbe28047960d5721c72..ce7b5ff02b380c2871654b92e66f9175109d765a 100644 (file)
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -639,7 +639,9 @@ static int NanD_IdentChip(struct nand_chip *nand, int floor, int chip)
        NAND_DISABLE_CE(nand);  /* set pin high */
        /* No response - return failure */
        if (mfr == 0xff || mfr == 0) {
+#ifdef NAND_DEBUG
                printf("NanD_Command (ReadID) got %d %d\n", mfr, id);
+#endif
                return 0;
        }
 
@@ -732,7 +734,7 @@ static void NanD_ScanChips(struct nand_chip *nand)
 
        /* If there are none at all that we recognise, bail */
        if (!nand->numchips) {
-               puts ("No flash chips recognised.\n");
+               puts ("No NAND flash chips recognised.\n");
                return;
        }
 

diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c
index ab9b2e5eaf59665797e2a9525b7dd66d84484462..0ad99b889c98b406d2381068acce1bdb3440f9c9 100644 (file)
--- a/cpu/ppc4xx/cpu.c
+++ b/cpu/ppc4xx/cpu.c
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2000
+ * (C) Copyright 2000-2003
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -22,8 +22,6 @@
  */
 
 /*
- * m8xx.c
- *
  * CPU specific code
  *
  * written or collected and sometimes rewritten by
@@ -73,17 +71,17 @@ int checkcpu (void)
        get_sys_info(&sys_info);
 
 #if CONFIG_405GP
-       puts("IBM PowerPC 405GP");
+       puts ("IBM PowerPC 405GP");
        if (pvr == PVR_405GPR_RB) {
                putc('r');
        }
-       puts(" Rev. ");
+       puts (" Rev. ");
 #endif
 #if CONFIG_405CR
-       puts("IBM PowerPC 405CR Rev. ");
+       puts ("IBM PowerPC 405CR Rev. ");
 #endif
 #if CONFIG_405EP
-       puts("IBM PowerPC 405EP Rev. ");
+       puts ("IBM PowerPC 405EP Rev. ");
 #endif
        switch (pvr) {
        case PVR_405GP_RB:
@@ -112,79 +110,71 @@ int checkcpu (void)
                putc('B');
                break;
        default:
-               printf("? (PVR=%08x)", pvr);
+               printf ("? (PVR=%08x)", pvr);
                break;
        }
 
-       printf(" at %s MHz (PLB=%lu, OPB=%lu, EBC=%lu MHz)\n", strmhz(buf, clock),
+       printf (" at %s MHz (PLB=%lu, OPB=%lu, EBC=%lu MHz)\n", strmhz(buf, clock),
               sys_info.freqPLB / 1000000,
               sys_info.freqPLB / sys_info.pllOpbDiv / 1000000,
               sys_info.freqPLB / sys_info.pllExtBusDiv / 1000000);
 
 #if defined(CONFIG_405GP)
-       if (mfdcr(strap) & PSR_PCI_ASYNC_EN)
-               printf("           PCI async ext clock used, ");
-       else
-               printf("           PCI sync clock at %lu MHz, ",
+       if (mfdcr(strap) & PSR_PCI_ASYNC_EN) {
+               printf ("       PCI async ext clock used, ");
+       } else {
+               printf ("       PCI sync clock at %lu MHz, ",
                       sys_info.freqPLB / sys_info.pllPciDiv / 1000000);
-       if (mfdcr(strap) & PSR_PCI_ARBIT_EN)
-               printf("internal PCI arbiter enabled\n");
-       else
-               printf("external PCI arbiter enabled\n");
+       }
+       printf ("%sternal PCI arbiter enabled\n",
+               (mfdcr(strap) & PSR_PCI_ARBIT_EN) ? "in" : "ex");
 #elif defined(CONFIG_405EP)
-       if (mfdcr(cpc0_boot) & CPC0_BOOT_SEP)
-               printf("           IIC Boot EEPROM enabled\n");
-       else
-               printf("           IIC Boot EEPROM disabled\n");
-       printf("           PCI async ext clock used, ");
-       if (mfdcr(cpc0_pci) & CPC0_PCI_ARBIT_EN)
-               printf("internal PCI arbiter enabled\n");
-       else
-               printf("external PCI arbiter enabled\n");
+       printf ("       IIC Boot EEPROM %sabled\n",
+               (mfdcr(cpc0_boot) & CPC0_BOOT_SEP) ? "en" : "dis");
+       printf ("       PCI async ext clock used, ");
+       printf ("%sternal PCI arbiter enabled\n",
+               (mfdcr(cpc0_pci) & CPC0_PCI_ARBIT_EN) ? "in" : "ex");
 #endif
 
 #if defined(CONFIG_405EP)
-       printf("           16 kB I-Cache 16 kB D-Cache");
+       printf ("       16 kB I-Cache 16 kB D-Cache");
 #else
-       if ((pvr | 0x00000001) == PVR_405GPR_RB) {
-               printf("           16 kB I-Cache 16 kB D-Cache");
-       } else {
-               printf("           16 kB I-Cache 8 kB D-Cache");
-       }
+       printf ("       16 kB I-Cache %d kB D-Cache",
+               ((pvr | 0x00000001) == PVR_405GPR_RB) ? 16 : 8);
 #endif
 #endif  /* defined(CONFIG_405GP) || defined(CONFIG_405CR) */
 
 #ifdef CONFIG_IOP480
-       printf("PLX IOP480 (PVR=%08x)", pvr);
-       printf(" at %s MHz:", strmhz(buf, clock));
-       printf(" %u kB I-Cache", 4);
-       printf(" %u kB D-Cache", 2);
+       printf ("PLX IOP480 (PVR=%08x)", pvr);
+       printf (" at %s MHz:", strmhz(buf, clock));
+       printf (" %u kB I-Cache", 4);
+       printf (" %u kB D-Cache", 2);
 #endif
 
 #if defined(CONFIG_440)
-       puts("IBM PowerPC 440 Rev. ");
-       switch(pvr)
-       {
+       puts ("IBM PowerPC 440 Rev. ");
+       switch(pvr) {
        case PVR_440GP_RB:
                putc('B');
-       /* See errata 1.12: CHIP_4 */
-       if(   ( mfdcr(cpc0_sys0) != mfdcr(cpc0_strp0) )
-           ||( mfdcr(cpc0_sys1) != mfdcr(cpc0_strp1) ) ){
-           puts("\n\t CPC0_SYSx DCRs corrupted. Resetting chip ...\n");
-           udelay( 1000 * 1000 ); /* Give time for serial buf to clear */
-           do_chip_reset( mfdcr(cpc0_strp0), mfdcr(cpc0_strp1) );
-       }
+               /* See errata 1.12: CHIP_4 */
+               if ((mfdcr(cpc0_sys0) != mfdcr(cpc0_strp0)) ||
+                   (mfdcr(cpc0_sys1) != mfdcr(cpc0_strp1)) ){
+                       puts (  "\n\t CPC0_SYSx DCRs corrupted. "
+                               "Resetting chip ...\n");
+                       udelay( 1000 * 1000 ); /* Give time for serial buf to clear */
+                       do_chip_reset ( mfdcr(cpc0_strp0),
+                                       mfdcr(cpc0_strp1) );
+               }
                break;
        case PVR_440GP_RC:
                putc('C');
                break;
        default:
-               printf("UNKNOWN (PVR=%08x)", pvr);
+               printf ("UNKNOWN (PVR=%08x)", pvr);
                break;
        }
 #endif
-
-       printf("\n");
+       puts ("\n");
 
        return 0;
 }
@@ -208,18 +198,18 @@ int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 
 #if defined(CONFIG_440)
 static
-int do_chip_reset( unsigned long sys0, unsigned long sys1 )
+int do_chip_reset (unsigned long sys0, unsigned long sys1)
 {
-    /* Changes to cpc0_sys0 and cpc0_sys1 require chip
-     * reset.
-     */
-    mtdcr( cntrl0, mfdcr(cntrl0) | 0x80000000 ); /* Set SWE */
-    mtdcr( cpc0_sys0, sys0 );
-    mtdcr( cpc0_sys1, sys1 );
-    mtdcr( cntrl0, mfdcr(cntrl0) & ~0x80000000 ); /* Clr SWE */
-    mtspr( dbcr0, 0x20000000);  /* Reset the chip */
-
-    return 1;
+       /* Changes to cpc0_sys0 and cpc0_sys1 require chip
+        * reset.
+        */
+       mtdcr (cntrl0, mfdcr (cntrl0) | 0x80000000);    /* Set SWE */
+       mtdcr (cpc0_sys0, sys0);
+       mtdcr (cpc0_sys1, sys1);
+       mtdcr (cntrl0, mfdcr (cntrl0) & ~0x80000000);   /* Clr SWE */
+       mtspr (dbcr0, 0x20000000);      /* Reset the chip */
+
+       return 1;
 }
 #endif
 

diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h
index 967a2d0944a93f423d0586428177accddb7dbb9a..be36ff4eafe9594776b247cdecb4ddddc7b7070e 100644 (file)
--- a/include/configs/PPChameleonEVB.h
+++ b/include/configs/PPChameleonEVB.h
@@ -31,7 +31,7 @@
 /*
  * Debug stuff
  */
-#undef __DEBUG_START_FROM_SRAM__
+#undef  __DEBUG_START_FROM_SRAM__
 #define __DISABLE_MACHINE_EXCEPTION__
 
 #ifdef __DEBUG_START_FROM_SRAM__
@@ -52,12 +52,8 @@
 
 #define CONFIG_SYS_CLK_FREQ     33333333 /* external frequency to pll   */
 
-#if 1
-#define CONFIG_BAUDRATE                9600
-#else
 #define CONFIG_BAUDRATE                115200
-#endif
-#define CONFIG_BOOTDELAY       3       /* autoboot after 3 seconds     */
+#define CONFIG_BOOTDELAY       5       /* autoboot after 5 seconds     */
 
 #if 0
 #define CONFIG_PREBOOT                                                          \
@@ -69,12 +65,12 @@
 
 #undef CONFIG_BOOTARGS
 #define CONFIG_RAMBOOTCOMMAND                                                  \
-       "setenv bootargs root=/dev/ram rw nfsroot=$(serverip):$(rootpath) "     \
-       "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;"    \
+       "setenv bootargs root=/dev/ram rw "     \
+       "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname):$(netdev):off;"   \
        "bootm ffc00000 ffca0000"
 #define CONFIG_NFSBOOTCOMMAND                                                  \
        "setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) "     \
-       "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;"    \
+       "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname):$(netdev):off;"   \
        "bootm ffc00000"
 
 #define CONFIG_PELK_NOR_KERNEL_NOR_RAMDISK_BOOTCOMMAND                         \
@@ -101,7 +97,7 @@
 #define CONFIG_ETH1ADDR        00:50:c2:1e:af:fd
 
 #undef CONFIG_EXT_PHY
-/*#define CONFIG_EXT_PHY*/
+
 #define CONFIG_MII             1       /* MII PHY management           */
 #ifndef  CONFIG_EXT_PHY
 #define        CONFIG_PHY_ADDR         1       /* PHY address                  */
@@ -110,24 +106,14 @@
 #endif
 #define        CONFIG_PHY_CLK_FREQ     EMAC_STACR_CLK_66MHZ
 
-#if 0 /* test-only */
 #define CONFIG_COMMANDS              ( CONFIG_CMD_DFL  | \
-                               CFG_CMD_IRQ     | \
-                               CFG_CMD_ELF     | \
                                CFG_CMD_DATE    | \
-                               CFG_CMD_JFFS2   | \
-                               CFG_CMD_I2C     | \
-                               CFG_CMD_EEPROM  )
-#else
-#define CONFIG_COMMANDS              ( CONFIG_CMD_DFL  | \
-                               CFG_CMD_IRQ     | \
                                CFG_CMD_ELF     | \
-                               CFG_CMD_NAND    | \
-                               CFG_CMD_MII             | \
-                               CFG_CMD_DATE    | \
+                               CFG_CMD_EEPROM  | \
                                CFG_CMD_I2C     | \
-                               CFG_CMD_EEPROM  )
-#endif
+                               CFG_CMD_IRQ     | \
+                               CFG_CMD_MII     | \
+                               CFG_CMD_NAND    )
 
 #define CONFIG_MAC_PARTITION
 #define CONFIG_DOS_PARTITION
@@ -146,7 +132,7 @@
  * Miscellaneous configurable options
  */
 #define CFG_LONGHELP                   /* undef to save memory         */
-#define CFG_PROMPT     "=> "           /* Monitor Command Prompt       */
+#define CFG_PROMPT             "=> "   /* Monitor Command Prompt       */
 
 #undef CFG_HUSH_PARSER                 /* use "hush" command parser    */
 #ifdef CFG_HUSH_PARSER

diff --git a/lib_ppc/board.c b/lib_ppc/board.c
index 5cf74a2415ef99c1cc8c566c234fc6302951eaad..6a2686aa3c1a96e39a4124cbbdea0ff30923b1bf 100644 (file)
--- a/lib_ppc/board.c
+++ b/lib_ppc/board.c
@@ -865,6 +865,7 @@ void board_init_r (gd_t *id, ulong dest_addr)
 
 #if (CONFIG_COMMANDS & CFG_CMD_NAND)
        WATCHDOG_RESET ();
+       puts ("NAND:  ");
        nand_init();            /* go init the NAND */
 #endif