]> git.sur5r.net Git - u-boot/commitdiff
mx31litekit: Fix boot with the new relocation scheme.
authorFabio Estevam <festevam@gmail.com>
Sun, 5 Jun 2011 14:56:02 +0000 (14:56 +0000)
committerStefano Babic <sbabic@denx.de>
Mon, 6 Jun 2011 07:35:25 +0000 (09:35 +0200)
imx31_litekit has been converted to the new relocation scheme, but it does not boot.

Make the boot functional by using board_early_init_f .

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
board/logicpd/imx31_litekit/imx31_litekit.c
include/configs/imx31_litekit.h

index 2ed742fb56bf2cd94ed64ccb9ff81b88e83ad1a7..bf635c301d7463d4a16c8799b8d1fbcb339cbd78 100644 (file)
 
 DECLARE_GLOBAL_DATA_PTR;
 
-int dram_init (void)
+int dram_init(void)
 {
-       gd->ram_size = PHYS_SDRAM_1_SIZE;
-
+       /* dram_init must store complete ramsize in gd->ram_size */
+       gd->ram_size = get_ram_size((volatile void *)PHYS_SDRAM_1,
+                               PHYS_SDRAM_1_SIZE);
        return 0;
 }
 
-void
-dram_init_banksize (void)
+void dram_init_banksize(void)
 {
        gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
        gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
 }
 
-int board_init (void)
+int board_early_init_f(void)
 {
        __REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */
        __REG(CSCR_L(0)) = 0xa0330d01;
@@ -71,6 +71,11 @@ int board_init (void)
        /* start SPI2 clock */
        __REG(CCM_CGR2) = __REG(CCM_CGR2) | (3 << 4);
 
+       return 0;
+}
+
+int board_init(void)
+{
        gd->bd->bi_arch_number = MACH_TYPE_MX31LITE; /* board id for linux */
        gd->bd->bi_boot_params = (0x80000100);  /* adress of boot parameters */
 
index 9405f562c4b34a78dc234fca76147972e9cd88b9..7ee7076f9366ce5a6e7e85baa9075c460d2a5e38 100644 (file)
 #define CONFIG_NR_DRAM_BANKS   1
 #define PHYS_SDRAM_1           CSD0_BASE
 #define PHYS_SDRAM_1_SIZE      (128 * 1024 * 1024)
+#define CONFIG_BOARD_EARLY_INIT_F
 
 #define CONFIG_SYS_SDRAM_BASE          CSD0_BASE
 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR