]> git.sur5r.net Git - u-boot/commitdiff
fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT
authorStephen Warren <swarren@nvidia.com>
Fri, 2 Oct 2015 23:44:06 +0000 (17:44 -0600)
committerSimon Glass <sjg@chromium.org>
Fri, 23 Oct 2015 15:42:28 +0000 (09:42 -0600)
PCI addresses are always represented as 3 cells in DT. (one cell for bus
and device, and two cells for a 64-bit addres). This does not vary based
on either the physical address size of the CPU, nor any #address-cells
property in DT (or more precisely, #address-cells must be set to 3 in any
PCIe controller's node).

Fix fdtdec_get_pci_addr() to use conversion functions that operate on
(fixed) cell-sized data rather than (varying) physical-address-sized
data, so that the function works on 64-bit systems.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Thierry Reding <treding@nvidia.com>
lib/fdtdec.c

index 1a863699348ebe55dd2fa9d7dfc0c0e5efb1184a..9db033ae73b53f18a9cc9beee3b9dd6e622297fd 100644 (file)
@@ -219,13 +219,13 @@ int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type,
 
                for (i = 0; i < num; i++) {
                        debug("pci address #%d: %08lx %08lx %08lx\n", i,
-                             (ulong)fdt_addr_to_cpu(cell[0]),
-                             (ulong)fdt_addr_to_cpu(cell[1]),
-                             (ulong)fdt_addr_to_cpu(cell[2]));
-                       if ((fdt_addr_to_cpu(*cell) & type) == type) {
-                               addr->phys_hi = fdt_addr_to_cpu(cell[0]);
-                               addr->phys_mid = fdt_addr_to_cpu(cell[1]);
-                               addr->phys_lo = fdt_addr_to_cpu(cell[2]);
+                             (ulong)fdt32_to_cpu(cell[0]),
+                             (ulong)fdt32_to_cpu(cell[1]),
+                             (ulong)fdt32_to_cpu(cell[2]));
+                       if ((fdt32_to_cpu(*cell) & type) == type) {
+                               addr->phys_hi = fdt32_to_cpu(cell[0]);
+                               addr->phys_mid = fdt32_to_cpu(cell[1]);
+                               addr->phys_lo = fdt32_to_cpu(cell[1]);
                                break;
                        } else {
                                cell += (FDT_PCI_ADDR_CELLS +